Sanyo DC-F430AV - IC Block Diagram

IC BLOCK DIAGRAM
IC101 CXA1782BQ (Servo Simal processor)
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Function
Input pin for the DEFECT bottom hold output
INo.I Namell/01
Function
No.1 Name
1
~Eo ~ Focus error amplifier output. Connection
internally to the comparator input.
26
ccl
capacitance-coucded.
I
27
DEFECT bottom hold output.
I
I 2 I FEI I I I
Focus error input.
Connection pin for DEFECT bottom hold
I
r3 IF=MI ‘ Iconstant.
Capacitor connection pin for detect time
28 I CB
capacitor.
Connection pin for MIRR hold capacitor.
Ground this pin through a capacitor when
FGD
I decreasing the focus servo high-
frequency gain.
29 CP
=
MIRR comparator non-inverted input.
Input pin for the RF summing amplifier output
RF summing amplifier output. Eye pattern
30 RF_l
I
5
6
7
8
9
FLB I
External time constant setting pin for
increasing the focus servo low frequency.
FE_O o Focus drive output.
FE_M I Focus amplifier negative input.
~mH , External time constant setting pin for
generating focus servo waveform.
TGU I
External time constant setting pin for
switching track-ing high frequency gain.
31 RF_O
check point.
RF
summing amplifier inverted input. The RF
32 RF_M I
-
amplifier gain is determined by the resistance
connected
between this pin and RFO pin.
APC(Auto Power Controller) amphfler output.
APC(Auto Power Controller) amplifier input. _
5
T
—
33 I LD
4’=-
RF I-V amplifier invertad input. Connect
these pins to the photo diodes A + C and B +
I
35
PHD1
10 TG2 I
External time constant setting pin for
switching track-ing high frequency gain.
High cut off frequency setting pin for
11 FSET I focus and tracking phase compensation
I
D pins.
RF I-V amplifier inverted input. Connect
36
I
PHD2 I
these pins to the photo diodes A + C and B +
D pins.
Bias adjustment of focus error amplifier.
amplifier.
12 TA_M
I Tracking amplifier negative input.
13 TA_O o Tracking drive output.
TbiE
T
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F I-V and E I-V amplifier inverted input.
I
38 F
I Connect these pins to the photo diodes F andl
14 sP_P I Sled amplifier non-inverted input.
15 SL_M I Sled amplifier negative input.
E.
F I-V and E I-V amplifier inverted input.
Connect these pins to the photo diodes F and
39 E
I
16 SL_O o Sled drive output.
17 ISET I
Setting pin for Focus search, Tracking
jump and Sled kick current.
E.
I-V amplifier E gain adjustment. (When not
using automatic balance adjustment.)
Ground
40 El
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o
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T
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I
-i
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I
z
—
18 Vcc
- +5.OV
19 CLK
I Serial data transfer clock input from CPU.
+
41 VEE
42 TEO
Tracking error amplifier output. E-F signal
output.
I
20 XLT I Latch input from CPU.
21 DATA I Serial data input from CPU.
22 XRST I Reset input; resets at Low.
23 C.OUT o Track number count signal output.
Outputa FZC, DFCT, TZC, Gain, BAL, and
24 SENS o others according to the command from
CPU.
Comparator input for balance adjustment.
(Input from TEO through LPF.)
I
Tracking error input.
Window comparator input for ATSC
detection.
Tracking zero-cross comparator input.
Capacitor connection pin for defect time
I
45 ATSC
46 I lZC
I
471TDFCT
constant.
(VCC + VEE) / 2 DC voltage output.
Focus OK comparator output.
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