Sanyo GCD 2700 - Page 37

IC BLOCK DIAGRAM
IC202 LA3361 (PLL FM MPX. STEREO DEMODULATOR)
PHASE
CONPENSATOR
INPUT LEVEL
vCOAOJ
(Loo?FILTERI
I
19 kl+z 1P CHARGE CAP
Vco
I
I
FF 112
FORCEO
Mom
Vcc
MPX IN
1
I $~i-~ ‘cc
OUTLFUT
WASE
OUTPUT STERE& LAMP
COMPENSATOR R
I
IC203 LM7001 [ELECTRONIC TUNING DIRECT PLL FREQUENCY SYNTHESIZER)
5K
KIN
XIIJT
FMIN
&MIN
CC CL
DATA
801
002
B03
ml
mz
Vml
VC92
Vss
IC501 , 601 BU4051B (ANALOGURE MULTIPLEXERS/DEMULTIPLEXERS)
.5 ..
All
I I
x
-39-
Fx
, CLOCK CONTROLLER [ dOOHZ1
KIN xWT
s XTAL OSC (7.21wZ1
FMIN AWN
, Lm.AL 05clLLAT1U4 sIw4M xww
CO CL DATA
z DATA IWUT ‘
—— —
Bol 802 Bm
, BAW DATA OUTPUT
VC9 I VCC12 VSS’ , P0w2R $WPLY I VM2 IS BAcK-W BATTERY ~
PO1 W2 , CWRG - CUTPUT
i
IFWBI1
4 B c
m SWI;CH
L
L
L L
Xo
L u L L
xl
L
L H L
Xz
L H H L
x3
L
L
L H
X4
L H L M
,5
L L H M
X6
L H H H
x7
H x x x
ml E
J
x c DCN. T CAPE
\
●
)
,’