Sharp CE-150 - Page 259

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Non-maskable inter rupt processi ng sequence
ln s 1 r1 !Cl lC) !l h\S lf OCI JO (l
r -·(SJ
s -1 - s
0- IE
0-I RD
Pl- ($)
s- 1-s
Pl l · $
s- 1-s
(l : ffCH )- PH
( l' fl :OH)- Pl
N
<D Maskable interrupt
fetch
If S= 1 005 H before go ir1 g into the int errupt
pr ocess. the contents of T and P are
stacked. and
it becon1es S= 10 02:H afler lhe
proc es s in g.
/-
-
V;i kle of S ~ 1 002H
3, f ! t:l lf l( (: !1 ~1p1
1 003H
j:) f~
1 004 H
PL
V ;:a ;oo of S 4- i 005 H
I
l,;c;l c> : <: • 1t errv p1
~
When M l is turned rrom l ow to hi gh lcv d, it sets t he flip flo p IR 2 ac ti ve . If th e
int er rupt e na ble IE is ac ti ve at this poi nt . interrupt is req uested to the CPU. so that
the C: Pl J starts ex ec uting th e int er rup t pr ocessing after cor npl ct i <>n of curren t
in~ t l'llc t i o n execu t io n. I R2 will b<: reset in a cour se of th e inc crr upt pr oc e ss .
\ Vhe n in terrupt r eq uest is iss ued \vh il c IE is inac ti ve, th1: interrupt \'
1
ill be ignored
ev en though l ll2 is set.
MI input is snrnplcd in t he sa n1c rn anncr as in t he <;o. t sc (lf N ri-11
Maskable interrupt processing sequence
I • SI
S- l -. S
!) .. I(
.. . .,
:P L- S)
S l ·· S
i'H • S
S I •S
fff &• • f' !I
(f/ 911 • :P L
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