DV-600S
DV-600H
Pin No. Terminal name I/O Operation function Remarks
55 MOEN O External RAM output permission signal.
56 MWEN O External RAM read/write selection.
57 DVSS – Digital power. (0V) For logic cell
58 DVDD3 – Digital power. (3.3V) For logic cell
59 MA9 O External RAM address bus.
60 MA8 O External RAM address bus.
61 MA7 O External RAM address bus.
62 MA6 O External RAM address bus.
63 MA5 O External RAM address bus.
64 MA4 O External RAM address bus.
65 MA3 O External RAM address bus.
66 MA2 O External RAM address bus.
67 MA1 O External RAM address bus.
68 MA0 O External RAM address bus.
69 DVSS – Digital power. (0V) For I/O cell
70 DVDD5 – Digital power. (5V) For I/O cell
71 MD7 I/O External RAM data bus. TTL level
72 MD6 I/O External RAM data bus. TTL level
73 MD5 I/O External RAM data bus. TTL level
74 MD4 I/O External RAM data bus. TTL level
75 MD3 I/O External RAM data bus. TTL level
76 MD2 I/O External RAM data bus. TTL level
77 MD1 I/O External RAM data bus. TTL level
78 MD0 I/O External RAM data bus. TTL level
79 SD7 O MPEG data output.
80 SD6 O MPEG data output.
81 SD5 O MPEG data output.
82 SD4 O MPEG data output.
83 DVSS – Digital power. (0V) For logic cell
84 DVDD3 – Digital power. (3.3V) For logic cell
85 SD3 O MPEG data output.
86 SD2 O MPEG data output.
87 SD1 O MPEG data output.
88 SD0 O MPEG data output.
89 SERR O MPEG data reliability flag. (Data error: “L”)
90 SOSO O MPEG output sector sync signal. (Sector top: “L”)
91 SVAL O MPEG data effective flag. (Effective state: “L”)
92 SDCK O MPEG data transfer clock.
93 DVSS – Digital power. (0V) For logic cell
94 SREQ I MPEG data request flag. (Request state: “L”) TTL level
95 RSTN I Hard reset input. (Reset state: “L”)
96 DVDD3 – Digital power. (3.3V) For logic cell
97 STDA O Operation state monitor data. Common with PWM.
(Output synchronizing with SDCK fall)
98 STCK O Operation state monitor sync signal. (Data top bit: “L”) Common with PWM.
99 UPWM O General-use PWM output. 4mA, 5V-I/F
100 DVSS – Digital power. (0V) For logic cell
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