EasyManua.ls Logo

Sharp IQ-9200 - LCD DRIVER DESCRIPTION AND DIAGRAM; LCD Driver Block Diagram

Sharp IQ-9200
46 pages
Save Page as PDF
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
OZ-9600
IT
TQ-9200
2-2.
LCD
driver
(LH1552F,
LH1553F)
1)
Introduction
The
LCD
driver
consists
of
six
segment
driver
(LH1552F)
and
a
com-
mon
driver
(LH1553F).
The
common
driver
has
240
internal
driver
circuits
and
operates
under
the
display
duty
of
1/240,
The
segment
driver
has
168
internal
driver
circuits.
To
abate
the
CPU
load,
connection
is
made
only
to
the
common
driver,
and
the
common
driver
transfers
data
with
a
several
(8
maxi-
mum)
segment
drivers.
The
8-bit
display
data
received
from
the
CPU
are
sent
to
the
common
driver,
and
sent
the
segment
display
RAM
"after
completing
processing
within
the
common
driver.
Common
driver
Maximum
®
Instructions
@
Window
function:
Allows
to
setup
a
maximum
16
windows.
@®
Data
block
transfer
function:
Used
to
write
continuing
data
and
to
send
data
blocks.
@®
Four
rules
of
arithmetic
operation:
Four
rules
of
arithmetic
opera-
tion
of
write
data
with
LCD
display
data
(loop
instruction),
SET,
AND,
OR,
EXOR,
and
NOT
operation
(inverse).
@
Masking:
Masks
the
write
and
read
data.
©
Automatic
address
increment
and
decrement
functions:
Can
inde-
pendently
increment
or
decrement
1
to
8
automatically
towards
direction
X
or
Y
after
accessing
the
write
or
read
address.
©
Vertical
write
and
horizontal
write:
Data
may
be
accessed
vertical-
ly
or
horizontally.
For
vertical
direction,
the
MSB
is
for
8
bits
on
a
column.
For
horizontal
direction,
the
MSP
is
for
8
bits
on
a
row.
8bit
MSB
MSB
8bit
@
Internal
droop
circuit:
To
prevent
a
drooping
phenomenon,
the
FRM
frequency
can
be
varied.
Address
conversion
feature:
When
an
absolute
address
is
ac-
cessed
by
the
CPU,
the
common
driver
distinguishes
to
which
segment
driver
to
be
addressed,
and
converts
it
to
the
absolute
address
for
accessing.
Common
driver
©
Common
output
impedance:
3.0KQ,
maximum.
©
Internal
common
LCD
display
drive
circuit:
240
circuits.
©
Window
RAM
capacity:
688
bits.
©
Segment
driver
Segment
output
impedance:
3.0KQ,
maximum.
o
°
°
°
°
°
Direct
display
of
RAM
data
by
the
internal
display
RM
Data
high:
Bit
active
Data
low:
Bit
inactive
Display
RAM
capacity:
240
x
168
=
40320
bits
(5040
bytes)
Internal
segment
LCD
display
drive
circuit:
168
circuits
Display
duty:
1/240
©
CMOS
process
©
Power
supply
GND
=
0VVec
(logic)
=
3.8V~6.5V
VEE
(LCD)
=
10.0~30.0v
©
PKG
Segment:
217
pins,
tab
film
Common:
325
pins,
tab
film
2)
Block
diagram
(LH1552F
segment
driver)
Supplied
from
the
common
driver
RAM
240
x
168
BITS
oO
uu
Qa
8
uu
Qa
>
v1
v2,V3,v4
04+}
I
Supplied
from
ou
deke
ooseetaeosas
ee
68
LVC.
Fig.4
LH1552F
block
diagram

Table of Contents

Related product manuals