Sharp IQ-9200

2) Pin description
Function
RW
NC
AO
At
A2
A3
A4
Do
DI
D2
D3
D4
D5
NC
D6
D7:
ALARM
INSRES
VDETO .
SRES
ON
OCE2
OCE1
OCEO
SCE
NC
BTCOV
RSKEY
ONKEY
ICE2
VSS —
o0o0o0o000 0-0
Supply voltage
Not used.
Not used. |
Reset terminal
Crystal oscillator connect pin .
Crystal oscillator connect pin
‘| Not used.
Internal low voltage output regulation
capacity connect pin
Frequency output pin
Voltage monitor pin
Voltage monitor pin
Voltage monitor pin
Voltage monitor pin
Test pin
Chip select pin
Chip select pin
Chip select pin
Read/write pin
Not used.
Address bus
Address bus
Address bus
Address bus
Address bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Not used.
Data bus
Data bus
Interrupt output pin
Reset input pin
VDD output monitor pin
Reset output pin
ON key output pin
WR output pin |
‘Not used.
Not used. ©
D battery protection control pin
Not used.
Battery replace pin
Reset switch
| ON key input pin
WR input pin
Power supply
OZ-9600 II
IQ-9200
3) Introduction
The SMC5245 is a calendar combined real time clock. It has a basic
frequency
of
32,768Hz
generated
from
a
crystal
oscillator
to
produce
second, minute, hour, day, day of week, month, and year. It has an
automatic
leap
year
interrogating
feature
of
the
world
calendar,
cyclic
interrupt
feature,
2-channel
alarm
feature,
and
a
4-channel
external
voltage detect feature.
For interfacing with a microcomputer, it uses 8-bit data bus, 5-bit
address
bus,
3-bit
chip
select
and
read/write
signals,
allowing
to
set
time, alarm, interrupt and to read time, interrupt cause, and voltage
detect result.
A part of the oscillation circuit and the frequency divider are driven by
a low voltage for a low power consumption.
4) Features
@ High speed CPU interface by means of 8-bit data bus.
*
©
Internal
time
counter
(second,
minute,
hour)
and
calendar
(day,
day of week, month, year).
® internal automatic leap year recognition feature
@ internal 2-channel alarm feature with a wild card feature
© Internal cyclic interrupt feature (day, hour, minute, second, 1/2
second)
© Internal 4-channel external voltage detect circuit
@ Low power dissipation using the CMOS technology and the volt-
age regulator
Internal 32.768Hz crystal oscillator
5) Pin functions
@ D0~D7: 8-bit data bus
These are bidirectional data bus that connected with the
microcomputer data bus and used to read/write counters and
registers. The data bus is at a high impedance except when
CS0~CS2 is active and R/W is at a high.
@ A0~A4: 5-bit address bus
These are address input lines that are within the microcomputer
address bus and used to assign read/write counters and registers.
@ CS0~CSS5: 5-bit address bus
These are chip select lines used to set active and inactive the IC.
Normally, address decoded signal is connected. CSO is an active
low signal. CS1 and CS2 are active high or low that can be
selected by masking. The IC becomes active when the 3-bit select
line has turned active.
® Read/Write pin
The contents of the counter and the register designated in ad-
dress AO~A4 at HIGH level are outputted to the data bus. Writing
is performed’ at LOW level. When CS0~CS2 are non-active,
neither read nor write can be made.
© ALARM interrupt output pin —
Cyclic interrupt, alarm interrupt, and voltage detect interrupt are
informed to the external source. With a mask option, active low or
high state can be selected. Only the software can be assigned to
set this line for set active or anaenve: These lines are not affected
by CS0~CS2.
© FOUR frequency output pin
The frequency of 32Hz is sent onto this output line for step adjust-
ment of the clock.
@ OSC1, OSCO crystal oscillator connect pin
These are pins connected with the 32,768 crystal oscillator.
® VDO0~VD3 detect voltage pin
These are input lines used to monitor external voltage.
@ Pin numbers 2, 3, 35~48 (QFP, 48 pins) user circuit i/o pins
input/output pins used for the user circuit.
@ VDD, VSS power supply pin
These lines are used to supply power.
@ VREG internal low voltage output regulation capacitor connect pin
A 0.1 capacitor is connected across VREG and VSS.