Sharp LC-32WD1E/S/RU - Page 132

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LC-32WD1E/S/RU, LC-37WD1E/S/RU, LC-42WD1E/S/RU, and LC-32/37/42WT1E
[4.12]Common Interface
1
1
G1
EN
1
1
G1
EN
1
1
G1
EN
EN
EN
EN
FAULT
IN OUT
SET
GND
ON
EN
EN
EN
EN
EN
EN
1
EN
&
&
&
&
G3
1
2
3EN2
3EN1
1
R1217
0R
0RR1220
0R
R1241
R1268
3K3
100n
C1251 C1250
100u 6V3
BLM21PG221SN1D
Z1204
TP1213
TP1211
TP1212
R1101-4 4 5
R1101-3 3 6
47R
R1101-2 2 7
47R
18
47R
45
47RR1101-1
36
R1102-4 47R
27
47RR1102-3
18
R1102-2 47R
45
47RR1102-1
36
47RR1203-4
27
R1203-3 47R
8
47RR1203-2
R1203-1 47R1
R1278
10K
8
15
1
16
4
7
9
12
D1214
74LVC157APW
MUX
2
5
11
14
3
6
10
13
12
6
10
13
8
15
1
16
4
7
9
D1213
74LVC157APW
MUX
2
5
11
14
3
15
1
16
4
7
9
12
74LVC157APW
MUX
2
5
11
14
3
6
10
13
8
D1212
20
3
5
7
9
17
15
13
11
10
19
74LVC244APW
D1226-2
4
6
8
10
1
20
18
16
14
12
D1226-1
74LVC244APW
2
R1275
1K8
R1274
1K8
R1273
100K
1
2
3
6
7
5
ST890CDR
D1211
8
4
11
10
19
20
3
5
7
9
74LVC244APW
D1225-2
17
15
13
18
16
14
12
2
4
6
8
10
1
20
9
D1225-1
74LVC244APW
17
15
13
11
10
19
20
3
5
7
D1224-2
74LVC244APW
6
8
10
1
20
18
16
14
12
74LVC244APW
D1224-1
2
4
R1271
10K
100n
C1209
2
35
4
74V1G04
D1223
3
5
7
9
17
15
13
11
10
19
20 10
1
20
18
16
14
12
D1222-2
74LVC244APW
74LVC244APW
D1222-1
2
4
6
8
8
10
1
20
18
16
14
12
74LVC244APW
D1221-1
2
4
6
15
13
11
10
19
20
3
5
7
9
D1221-2
74LVC244APW
17
12
13
714
11
74LVC00A
D1220-4
1
2
714
3
4
5
714
6
D1220-1
74LVC00A
14
8
D1220-2
74LVC00A
74LVC00A
D1220-3
9
10
7
47R
R1267
R1266
47R
47R
R1265
R1264
47R
47R
R1263
R1262
47R
47R
R1261
45
R1260
47R
36
47R R1239-4
27
R1239-347R
45
47R R1239-2
6
47R R1244-4
R1244-347R 3
C1240
100n
100n
C1241
100n
C1242
R1248-445
R1248-336
47R
R1248-227
47R
18
47R
18
47R R1248-1
27
R1247-147R
36
R1247-247R
5
R1247-347R
5
R1247-447R 4
47R R1246-44
7
47R R1246-336
47R R1246-22
47R R1246-118
47R 18
R1245-247R 27
R1245-1
R1245-347R 36
R1245-447R 45
47R 18
R1244-227
R1239-1
47R R1244-118
47R
47R 45
36
R1243-4
47R 27
R1243-347R
18
R1243-2
R1242-445
R1243-147R
47R R1242-336
47R
R1242-227
47R R1242-118
47R
9
69 70 71 72
61
62
63
64
65
66
67
68
7
8
51
52
53
54
55
56
57
58
59
6
60
41
42
43
44
45
46
47
48
49
5
50
32
33
34
35
36
37
38
39
4
40
23
24
25
26
27
28
29
3
30
31
13
14
15
16
17
18
19
2
20
21
22
10074595-050LF
X1201
1
10
11
12
C1229
100n
6V3100u
C1221
Z1202
BLM21PG221SN1D
100nC1226
C1225
100n
10K
R1236R1235
10K 10K
R1234 R1233
10K
10K
R1232
10K
R1231
10K
R1230
10K
R1229
R1228
10K
R1227
10K
R1226
10K
10u
C1222
R1219
10K
C1213
100n
D1208
2
35
4
74V1G04
C1212
100n
14
13
12
11
1
10
19
20
4
5
6
7
8
9
18
17
16
15
74LVC245APW
D1207
2
3
100n
C1217
C1208
100n 100n
C1207 C1206
100n 100n
C1205
100n
C1204
C1203
100n 100n
C1202 C1201
100n
CDn
+5V_CARD
TS_SWITCH
+5V_CARD
+5V_CARD
+5V_CARD+5V_CARD
+5V_CARD+5V_CARD+5V_CARD
+5V_CARD
TSIND0
TSIND1
TSIND2
TSIND3
TSIND4
TSIND5
TSIND6
TSINBCLK
TSINVALID
TSIND7
TSINPSYNC
+3V3D +3V3_CARD
PWRENn
PWRENn
PWRFAIL
+5V_CARD
CARD_ENn
IORDn
IOWRn
PWRENn
+3V3_CARD
RESET_CIn
PWRENn
NOT_REG
NOT_RESET_CI
NOT_IORD
NOT_IOWR
+3V3_CARD
+3V3_CARD
NOT_CD1
NOT_CD2
NOT_VS1
NOT_READY
VS1n
READYn
+3V3_CARD
+3V3_CARD
+3V3_CARD
+3V3_CARD
TS_SWITCH
TS_SWITCH
+3V3_CARD
PWRENn
+3V3_CARD
+3V3_CARD
+3V3_CARD
NOT_CARD_EN
PWRENn
TS_SWITCH
+3V3_CARD
+3V3_CARD
+3V3_CARD
TS_IN_STRT
TS_IN_VAL
TS_IN_CLK
TS_SWITCH
+3V3_CARD
NOT_REG
NOT_CD1
NOT_WAIT
FMI_WAIT
+5VD
+5V_CARD
NOT_VS1
TS_OUT_VAL
TS_OUT_STRT
+3V3_CARD
NOT_CARD_EN
NOT_CARD_EN
NOT_OE
+5V_CARD
VCC_CARD
NOT_READY
NOT_WE
+5V_CARD
CI_IN_VAL
CI_IN_CLK
+5V_CARD
NOT_CD2
NOT_IOWR
NOT_IORD
CI_IN_STRT
VCC_CARD
TS_OUT_CLK
NOT_RESET_CI
NOT_WAIT
+3V3_CARD
NOT_BE1
FMI_A(18)
+3V3_CARD
CI_EN
+3V3_CARD
CARD_ENn
CARD_ENn
+3V3_CARD
+3V3_CARD
CARD_DIR
FMI_RDWRn
+5V_CARD
PWRENn
+5V_CARD
TS_OUT_DATA(2)
TS_OUT_DATA(1)
TS_OUT_DATA(0)
OPTION
OPTION
OPTION
OPTION
VCC_CARD
FMI_LBAn
TS_IN_STRT
TS_IN_CLK
TS_IN_VAL
FMI_OEn
CI_IN_CLK
CI_IN_STRT
CI_IN_VAL
+3V3_CARD
+3V3_CARD
NOT_WE
NOT_OE
TS_IN_DATA(2)
TS_IN_DATA(3)
TS_IN_DATA(4)
TS_IN_DATA(5)
TS_IN_DATA(6)
TS_IN_DATA(7)
TS_OUT_DATA(7)
TS_OUT_DATA(6)
TS_OUT_DATA(5)
TS_OUT_DATA(4)
TS_OUT_DATA(3)
TS_OUT_DATA(0:7)
TS_OUT_DATA(5)
TS_OUT_DATA(4)
TS_OUT_DATA(3)
TS_OUT_DATA(2)
TS_OUT_DATA(1)
TS_OUT_DATA(0)
TS_OUT_DATA(6)
TS_OUT_DATA(7)
TS_IN_DATA(0)
TS_IN_DATA(1)
D(5)
D(6)
D(7)
CI_IN_DATA(7)
CI_IN_DATA(6)
CI_IN_DATA(5)
CI_IN_DATA(4)
CI_IN_DATA(3)
CI_IN_DATA(2)
CI_IN_DATA(1)
CI_IN_DATA(0)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
D(0)
D(1)
D(2)
D(3)
D(4)
D(0)
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
FMI_D(3)
FMI_D(2)
FMI_D(1)
FMI_D(0)
D(0:7)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
FMI_D(0:7)
FMI_D(7)
FMI_D(6)
FMI_D(5)
FMI_D(4)
FMI_A(17)
A(0:14)
A(0:14)
A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
FMI_A(5)
FMI_A(6)
FMI_A(7)
FMI_A(8)
FMI_A(9)
FMI_A(10)
FMI_A(11)
FMI_A(12)
FMI_A(13)
FMI_A(14)
FMI_A(16)
CI_IN_DATA(1)
CI_IN_DATA(2)
CI_IN_DATA(3)
CI_IN_DATA(4)
CI_IN_DATA(5)
CI_IN_DATA(6)
CI_IN_DATA(7)
FMI_A(1:18)
FMI_A(2)
FMI_A(3)
FMI_A(4)
TS_IN_DATA(0:7)
TS_IN_DATA(0)
TS_IN_DATA(1)
TS_IN_DATA(2)
TS_IN_DATA(3)
TS_IN_DATA(4)
TS_IN_DATA(5)
TS_IN_DATA(6)
TS_IN_DATA(7)
CI_IN_DATA(0:7)
CI_IN_DATA(0)