(3)  Mapping RAM 
Outline 
*  The  mapping 
RAM 
is 
used 
to 
specify 
the 
location 
and 
area occupied by each window on 
the 
display screen. 
*  The  mapping 
RAM 
exists 
on 
the 
GDC's memory map, 
as 
shown 
in 
the 
above  figure  (can 
not 
accessed  from 
the 
CPU). 
*  The  mapping 
RAM 
is 
used  in  correlation  with 
the 
display  screen, 
as 
illustrated  below  (for 
640 
x 
400 
dot 
display): 
bi t  0  1  2  3  4  5  6  7 
30000H 
3007F 
3008 
OH 
Not 
used. 
Column 
Map 
Row 
Map 
lO24Worns 
128Words 
Fig. 
71 
Column 
length 
bi 
t 
AdO 
I. 
Window A 
·1 
399 
1023 
Mapping RAM  access 
CRT 
1 
0  0 
1 
0  0 
2 
0 
3 
0 
I  , 
,  I 
,  , 
-," 
,~ 
.,.' 
---
0 
1 
0 
0 
I 
, 
I 
I 
, 
, 
/ 
'" 
1  0 
/ 
/ 
, 
/ 
0 
, 
1 
I 
0 
I 
0  1  0 
0 
0  I  0 
0  0 
0  0  1 
I  1 
I  I 
I  I  I 
I  I  I 
I  I  I 
/  /  I 
/  I  / 
/  /  / 
'" 
",I' 
/  / 
". 
/  " 
"  /  / 
, 
,/ 
". 
"" 
..... 
."..,./ 
/~~ 
,-
/ 
'" 
,-
,-
..-
,/ 
,-
,-
/ 
,/ 
/ 
/ 
/ 
/ 
0 
0 
0 
0 
0 
1 
0 
0 
0 
Column 
Map 
RAM 
The 
four 
corners 
of 
each 
window 
are specified. 
!-"""""""I.....c....-'-.....,..:;....,::;~ 
______ 
L 
__ 
---
bi 
t  AdO 
4 
5 
6 
7 
0 
0 
0 
0 
o  1  0 
0 
o  0 
1 
0 
1  0 
0 
1 
,  I 
I 
0 
o  0  1  0 
0 
1  0  0 
0 
1 
0 
1 
00' 
, 
0
' 
, 
1 
Row 
length 
WindowB 
Fig. 
72 
*  Mapping  information 
is 
divided 
into 
horizontal 
and 
vertical 
components 
when 
written 
into 
the 
mapping 
RAM, 
as 
shown above. 
* 
As 
each window 
is 
located using 4 bits, no more 
than 
16 
bits are ever set 
at 
anyone 
time. 
Configuration 
of 
WOC 
and 
mapping RAM 
I-o--'--r-I 
ADO 
(Al 
~ 
AD 
15 
Data 
Mappirg 
WDC 
Address 
RAM 
2XCCLK 
GOC 
BLANK 
RAS 
Mapping 
Data 
RAM 
Address 
Write 
Fig.  73 
-60-
127 
0 
0 
Row 
Map 
RAM 
0 
0 
*  Initial  information 
is 
written into 
the 
mapping 
RAM 
by 
using 
the 
GDC's drawing feature. 
The 
Fig,  73  provides 
the 
WDC,  mapping  RAM,  and 
GDC configuration. The 
CS 
of 
the 
mapping 
RAM 
is 
always 
low, 
and 
is 
read when windows are displayed. When writing 
data 
into 
the 
mapping  RAM, 
the 
WDC 
controls 
the 
buffer 
(A) 
and 
RAM 
write signal 
to 
let 
the 
GDC  write 
the 
neces-
sary data. 
Fig. 
70 
shows 
the 
WDC 
block  diagram.  The 
WDC 
latches 
address information (for displaying, drawing and refreshing) 
transferred from 
the 
GDC, 
and 
modifies it according 
to 
the 
contents 
of 
the 
VMA 
or 
mapping RAM,  if needed. 
The 
WDC 
knows 
the 
locations of windows from bit inform-
ation 
read 
out 
of 
the 
mapping  RAM,  latches 
the 
display 
address  transferred  from 
the 
GDC,  adds  VMA 
to 
the 
latched display address, and uses 
the 
resulting address as the 
actual  display  address 
on 
the 
screen.  However,  when 
the 
GDC 
is 
blanking  (for  drawing 
or 
refreshing) 
or 
if 
the 
priority register 
value 
is 
zero, 
the 
WDC 
directly 
outputs 
the 
display address which has been transferred from 
the 
GDC.