Siemens 7SR224 - Figure 4.4-1 Sequence Diagram: Quick Logic PU;DO Timers (Counter Reset Mode Off)

(1) Description of Operation 7SR224
©2009 Siemens Protection Devices Limited Page 51 of 66
P.U. DELAY
D.O
. DE
LA
Y
Figure 4.4-1 Sequence Diagram: Quick Logic PU/DO Timers (Counter Reset Mode Off)
When the count value = En Counter Target the output of the counter (En) = 1 and this value is held
until the initiating conditions are removed when En is instantaneously reset.
The output of En is assigned in the OUTPUT CONFIG>OUTPUT MATRIX menu where it can be
programmed to any binary output (O), LED (L) or Virtual Input/Output (V) combination.
Protection functions can be used in Quick Logic by mapping them to a Virtual Input / Output.
Refer to Section 7 – Applications Guide for examples of Logic schemes.