V1.0 Page 30 of 46 ICM MP CCQ ST
C45, M50 AND MT50 Company Confidential © Copyright Siemens AG 05/02
6.2 EGOLD (PMB6850) V2.x
P ROM
48k x 16
P RAM
5k x 16
Y RAM
2k x 16
X ROM
18k x 16
X RAM
6k x 16
PRAM
1k x 16
Bus
Interface
Unit
Shared Memory
Dual Port 512 x 16
Keypad
Interface
GSM
TDMA Timer
TAP Controller
JTAG
Boundary Scan
GMSK Modulator
Voiceband Filters
RX and TX
Baseband Filter
A51/52
Cipher
Unit
SIM card
Interface
High Speed
(F=512, D=8/16)
32 kHz
13 MHz / 32 kHz
52 MHz
Dual Port RAM
1k x 16
Interrupt Controller
OCEM
E-GOLD Architecture
SRAM
xk x 16 (x = 0...64)
DSP Timer2
X-Bus
PD-Bus
Interleaving
2 x 28 x 116 x 1
PROM
1k x 16
Boot
Block
Company confidential
De-Interleaving 12k x 4
16 bit write access
4/16 bit read access
DSP Serial
Communication
Interface
Enhanced Handsfree / DAI
3 39
2 MHz (to GAIM)
RTC
External
Bus & Port
Controller
AFC Unit
Pulse-Carry Mod.
Interrupt
Extension
60
Power
Management
DSP Timer1DSP Timer1
OAK+ DSP
ž Interleaving / De-Interleaving
ž Speech Decoding (FR, HR, EFR)
ž
Speech Coding (FR, HR, EFR)
ž
Level Measurement
ž Channel Decoding (FR, HR, EFR)
ž Channel Coding (FR, HR, EFR)
ž Equalization
ž Encryption / Decryption
ž Voice Memo / Voice Dialing
Viterbi
HW
Accelerator
ID Register
SSC
SPI
compatible
ASC0
Autobaud
Detect
ASC1
8
523
2
5
Multicore
Debug Support
SEIB
CAPCOM
2 x 8 bit
16
RF Control
45
8 16
3
5
GPT1/GPT2
Watchdog
8
CS(4:0)2
Interrupt Controller
READY#
NMI#
HOLD#
HLDA#
CLKOUT
RSTOUT#
Osc.
32.768 kHz
Enable Signals to
X- and PD-Bus
Peripherals
requires ext. crystal
and special bondout
OCDS DPEC
MCU
C166CBC
Clock Generation
Peripheral Enable
Generator
A(20:0)
21 24
64
to MCU &
Clock Generation Unit
6
16 bit I/O Ports
H. Meschede, HL AS CR CE,
Audio & Speech
TMS
TCK
TDO
TDI
VBIN
VBOUT
DACI
DACQ
BPDM2
BPDM1
TRST
VCLK
F13M
CLKANA
VDDRTC
TXD0 / - / PE.4
RXD0 / - / PE.3
TXDD / TXD1 / PF.6
TFSD / T2IN / PF.10
SCLK / T6EUD / PF.8
RFSD / - / PF.9
RXDD / RXD1 / PF.7
VDDa
VSSa
VCXO_EN / - / PE.8
CLKSXM / A21 / PF.5
MRST / - / PE.7
MTSR / - / PE.6
SSCCLK / - / PE.5
F32K
RTCOUT
PDOUT / A23 / PF.4
TXD1 / CC04IO / PE.0
RXD1 / EX1IN & T5EUD /
PE.1
DSPOUT0 / A22 / PF.3
D(7:0)
AFC
READY / WAKEUP / PC.1
CC02IO / - / HOLD & DSPOUT1 / PF.0
CC01IO / NMI & DSPOUT2 / PE.2
HLDA / CC03IO & DSPIN0 & T2IN / PC.3
T5IN / T2EUD & T3IN / PC.4
CC06IO / A21 & EX7IN / PF.11
CLKOUT / CC05IO / PC.0
DSPOUT1 / A22 / PF.1
MON1
MON2
TRIGIN
TRIGOUT
CS2 / CC02IO / PF.12
CS3 / EX4IN & DSPIN0 & T4EUD / PF.13
CS4 / DSPOUT2 / PF.14
RD
WR
CC00IO / T3OUT / PC.2
CS0
CS1
RESET_IN
D8 / CC20IO / PA.8
D9 / CC16IO / PA.9
D10 / - / PA.10
D11 / - / PA.11
D12 / EX5IN / PA.12
D13 / T7IN / PA.13
D14 / CC22IO / PA.14
D15 / CC18IO / PA.15
BHE / CC00IO / PF.15
RSTOUT / EX6IN & T3EUD / PF.2
VDD2.(4:1)
VDD2.0x, x=a,b,c
VSS2.(4:1)
VSS2.0x, x=a,b,c
I/O Driver
VDD1.(2:0)
VSS1.(2:0)
Core
GAIMDATA
GAIMSTR
GAIMCLK
RFSTR1
RFSTR0
RFDATA
RFCLK
RFSTR4 / EX2IN / PD.2
RFSTR3 / CC18IO / PD.1
RFSTR2 / CC07IO / PD.0
T_OUT12 / A23 / PD.11
T_OUT11 / CC19IO / PD.10
T_OUT10 / EX1IN & DSPIN1 / PD.9
T_OUT9 / T7IN & EX3IN / PD.8
T_OUT8 / CC23IO / PD.7
T_OUT7/ CAPIN / PD.6
T_OUT6 / T4IN / PD.5
T_OUT5 / CC17IO / PD.4
T_OUT4 / DSPIN0 / PD.3
CCIN
KP9 / CC18IO / PB.9
KP8 / CC22IO / PB.8
KP7 / T7IN / PB.7
KP6 / EX5IN / PB.6
T_OUT3
T_OUT2
T_OUT1
T_OUT0
GAIMRXON
KP5 / - / PB.5
KP4 / - / PB.4
KP3 / CC16IO / PB.3
KP2 / CC20IO / PB.2
KP1 / CC06IO / PB.1
KP0 / T2EUD & EX0IN / PB.0
CCRST
CCLK
CCIO
CCIOSW / T6OUT & T0IN
& T6IN / PB.11
CCVZ / - / PB.10