Appendix
A.1 Information about upgrading to a CPU 31xC or CPU 31x
CPU 31xC and CPU 31x, Technical Data
A-4 Manual, 01/2006 Edition, A5E00105475-06
Activating / deactivating DP slaves via SFC 12
With CPUs 31xC/31x, slaves that were deactivated via SFC 12 are no longer automatically
activated at the RUN to STOP transition. Now they are not activated until they are restarted
(STOP to RUN transition).
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP
Interrupt events from distributed I/Os while the CPU status is in STOP
With the new DPV1 functionality (IEC 61158/ EN 50170, volume 2, PROFIBUS), the
handling of incoming interrupt events from the distributed I/Os while the CPU status is in
STOP has also changed.
Previous response by the CPU with STOP status
With CPUs 312IFM – 318-2 DP, initially an interrupt event was noticed while the CPU was in
STOP mode. When the CPU status subsequently returned to RUN, the interrupt was then
fetched by an appropriate OB (e.g. OB 82).
New response by the CPU
With CPUs 31xC/31x, an interrupt event (process or diagnostic interrupt, new DPV1
interrupts) is acknowledged by the distributed I/O while the CPU is still in STOP status, and
is entered in the diagnostic buffer if necessary (diagnostic interrupts only). When the CPU
status subsequently returns to RUN, the interrupt is no longer fetched by the OB. Possible
slave faults can be read using suitable SSL queries (e.g. read SSL 0x692 via SFC51).
A.1.4 Runtimes that change while the program is running
Runtimes that change while the program is running
If you have created a user program that has been fine-tuned in relation to certain processing
times, please note the following points if you are using a CPU 31xC/31x:
• the program will run much faster on the CPU 31xC/31x.
• Functions that require MMC access (e.g. system start-up time, program download in
RUN, return of DP station, etc), may sometimes run slower on the CPU 31xC/31x.
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