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S7-300 Automation System, Hardware and Installation: CPU 31xC and CPU 31x
A5E00105492-03
9-31
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Note the following rules when working with intermediate memory:
• Assignment of address areas:
– Input data of DP slaves are DOZD\V output data of the DP master
– Output data of DP slaves are DOZD\V input data of the DP master
• The user can define these addresses. In the user program, access data with
load/transfer instructions or with SFC 14 and SFC 15. You can also specify
addresses from the input/output process image (refer to Chapter $GGUHVVLQJ
8VHUGHILQHG$GGUHVVLQJRI0RGXOHV).
• The lowest address of specific address areas is their respective area start
address.
• The length, unit and consistency of the address areas for DP master and DP
slave must be identical.
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Assign addresses from the DP address area of the DP
memory.
ou must not assi
n addresses specified for the intermediate memor
a
ain for
the I/O modules on the DP CPU. When using consistent data areas in
intermediate memory, note the section on &RQVLVWHQW'DWD in Chapter
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If you use an IM 308-C as a DP master and the DP CPU as a DP slave, the
following applies to the exchange of consistent data.
You must program FB192 in IM 308-C to enable exchange of consistent data
between a DP master and the DP slave. With the FB192, the data of the DP CPU
are only output or read out in a consistent block.
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If you set up an AG S5-95 as a DP master, you must also set its bus parameters
for the DP CPU as a DP slave.
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The DP slave CPU goes into STOP mode: Data in CPU intermediate memory are
overwritten with "0". That is, the DP master reads "0".
The DP master goes into STOP mode: Actual data in CPU intermediate memory is
maintained and can still be read by the CPU.
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For the DP CPU, you must QRWset as a PROFIBUS address.
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