Sony BDP-S485 - Page 52

BDP-S485
1
A
B
C
D
E
F
G
H
I
J
2
12
13
11
10
98765
43
14
- Ref. No.: MB-139 board; 10,000 series
4-16
GPIO/JTAG
MB-139
1
2
3
4
5
6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
UART/GPIO
GPIO8
XAMUTE
XX
R1173
XX
R1176
XX
R1172
CN1102
6P
SYSCON_RST
JL1133
JL1134
JL1125
JL1124
JL1123
JL1126
JL1127
JL1128
CN1101
24P
JL1130
IF_SCK
XX
R1175
0
R1156
CPU_NFCEN2
CPU_NFALE
CPU_NFCLE
3.3VA
0
R1160
C1114
XX
C1113
XX
10k
R1169
JL1132
JL1131
100k
R1189
C1112
XX
JL1129
CPU_NFWEN
CPU_NFREN
XX
R1181
1k
R1180
XX
R1188
JL1110
JL1111
JL1112
JL1113
JL1122
IF_SDI
IF_SDO
RB1101
10k
XX
R1155
XX
R1158
JL1121
JL1120
START_BIT
XX
R1128
XXR1129
UPG_STATUS
USB_VBUS_PCONT1
JL1118
JL1119
OPWRSB
XX
R1159
JL1114
XX
R1106
XX
R1108
XX
R1113
10k
R1171
XX
R1130
XX
R1136
XX R1137
XX
R1132
XX
R1133
XX
R1157
CPU_NFCEN
XX
R1105
XX
R1131
C1108
XX
JL1116
JL1115
JL1146
JL1152
JL1148
JL1154
JL1157
JL1156
JL1145
JL1153
JL1155
RB1102
10k
10k
R11 38
10k
R1150
XX
R1149
GND
XVMUTE
JIG_MODE1
XX
R1193
10k
R1194
ETTXEN
IF_SDI
0
R1195
XX
R1196
UNSW3.3V
4.7k
R1198
4.7k
R1199
3.3VA
GND
10k
R1146
XX
R1145
10k
R1144
10k
R1143
10k
R1142
XX
R1109
10k
R1110
XX
R1114
XX
R1115
XX
R1107
XX
R1116
*IC101
CXD9998G-AB/AC/CB/CC
D10
AMUTE
L25
VSTB
M23
VDATA
M24
VCLK
L26
LCDRD
F9
GPIO0
E9
GPIO1
G9
GPIO2
D9
GPIO3
AD6
GPIO4
AE6
GPIO5
AE5
GPIO6
AC7
GPIO7
H24
GPIO8/5V_RX
B10
SC
L
C10
SDA
K26
UATXD
J25
UARXD
AF7
TRST_
AD8
TDI
AE7
TMS
AD7
TCK
AF6
TDO
K23
RESET_
AC9
EFPWRQ
K25
IR
K24
OPWRSB
STRAP_AOSDATA2
STRAP_AOSDATA1
STRAP_AOSDATA0
STRAP_AOLRCK
XX
R1151
XX
R1152
XX
R1153
XX
R1154
10k
R1161
10k
R1162
10k
R1163
10k
R1165
3.3V
GND
RXD
TXD
JIG_MODE1
JIG_MODE0
SW3.3V
SW3.3V
GND
GND
CPU_UARXD
CPU_UATXD
GND
ICE1_TMS
ICE1_RTCK
ICE1_TRST
ICE1_TDI
GND
ICE1_TCK
GND
ICE1_TDO
EXT_XRST
GND
JIG_MODE1
JIG_MODE0
GND
1.5mm NISECON
RESERVE
GND
RESERVE
ICE_MODE
ICE
ROM boot/Flash boot
Reserved trapping
Chip self test mode
RTC Strapping
Boot Strap
MAIN RISC ICE
to ICE
JIG_MODE[1:0]
00
01
10
11 NORMAL MODE
DIAG MODE
UPG MODE
reserved
MODE
Power Control
OLT test mode
ABIST mode
Chip self test mode
*Change Pull resitor to others 3.3 source.
*Must earlier then 3.3VA
*Change after confirm with MT K
*Target:
To IFCON
Chip self test mod e
Chip self test mod e
From Power Block Sht3
*Change ETHER_XRST to XVMUTE.
*GPIO8 is reserve for BDV Special function.
•
See page 5-4 for printed wiring board.
4-16. MB-139 BOARD (CXD9998G-AB/AC/CB/CC) SCHEMATIC DIAGRAM (11/17)