Sony CDP-997 - IC Pin Function Reference; CXD2561 M-1 and CXD2560 M Pinouts

e 10342 (CXD2561M-1)
Pin No. | Symbol | I/O Description
SECTION 3
IC PIN FUNCTIONS
Digital power supply
Test pin
Normally fixed to “L”
2
Re-synchronizes at rising edge 3
¢ 1€341 (CXD2560M)
[Pinwe. [Symbol] VO | Description
[i [vs
SYSM
I
ATT
CTL
17 |MCLK | 1 |
INIT
Re-synchronizes at rising edge
of this signal.
BCK input
LRCK input
| CDP-997
Power supply pin (GND)
System mute input
“H”: active
CTL “L”: ATT data input
CTL “H”: EMP input
CTL “L”: shift clock input
CTL “H”: FS32 input
CTL “L”: latch clock input
CTL “H”: FS48 input
Pull-down within IC
“H”: direct input mode.
“L”: serial transfer mode.
Test pin
Normally fixed to “L”
Master clock input (f=512 Fs)
Power supply pin (+5V)
O | BCK output
Lch data output
2 INTE : of this signal.
a [eRe ae
5 DATAR I Rch data input
6 DATAL I Lch data input
. 5 LATCH
a
[8 [pve [= [Digit GND
Crystal oscillation input pin
ac es
(22.5 MHz) | 9 |
| 10
Substrait
i VSUB ~ | Connected to GND a f
v
Pie
PRG)
[0
|
Reh
PLM
output
|
Ginphase)
|
18 [ RIG) | O | Reh PLM output nia) |
19 [RO@) [0 | Reh PLM oupur2 (phase) |
20 | R2) | 0 | Reb PLM oupur 2 (aniphasey | [17 |
23 L2(-) | O | Leh PLM output 2 (antiphase) 20°.
24 Leh PLM output 2 (in-phase)
25 po Lch PLM output | (antiphase)
26 Analog GND
27 FL) [0 Leh PLM ouput Gass) |
[28 [avoot [= [Aratog powersupnly |
1 DR O
72 [ ERCKO | 0
| 23 | FLGL [| oO | Leh ¢ mute flag output
[24 ruGR [0 [Reh mute Mag oust |
Rch data output
LRCK output