Sony D-E350 - Schematic Diagram -MAIN SECTION (3;3)

13 13
D-E350/E351/E351SR/E353/E355/E356CK
5-6. SCHEMATIC DIAGRAM – MAIN SECTION (3/3) – • Refer to page 14 for Notes. • Refer to page 14 for waveforms.
S808
S809
S810
S811
IC801
C809
C810
C811
C812
TP812
TP815
R820
TAP803
R823
R806
D801
C801
C802
R824
R817
TAP801
C818
R801
C804
C807
Q808
C805
R816
C813
TAP802
S801
S802
S803
D805
S807
S806
S805
R811
R812
R809
R810
R813
R814
R815
D804
C814
TP806
TP807
TP803
TP809
TP811
TP820
C806
R804
R803
CN901
T5AW5-Z5-M0
0.1
0.1
0.22
0.1
VCC2_ON
10k
100k
100k
MA2ZD1400
1
0.22
0
100k
TEST
4700p
100k
0.01
0.01
0.01
0.01
220k
4700p
OPEN
(DOOR OPEN)
UMZ6.8N
2.2k
4.7k
10k
10k
2.2k
4.7k
10k
UDZS5.1B
0.1
SEG15
SEG0
10k
10k
B1
GND
DCINMNT
VCPU 2V
RMKEY
HOLD
AMUTE
XRST
POFF
COM0
COM1
COM2
COM3
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
RESET
SRW
SCK
FOK
XBUSY
HOLD
G-PRO
OPEN
SCOR
SDTO
POWERLT
SDTI
CLK4M
G-PRO
GFS
OPEN
OPSTB
HPSW
OPGSW
XW
AKEUP
C2PO
SEG14
ESPLT
DEFECT
P23
PGM_SEL
PGM_SCK
PGM_SDTI
PGM_SDTO
RESET2
TEST
CLK4M2
BEEP
BATMNT
CHGM
NT
PGM_SCK
PGM_SDTI
PGM_SDTO
PGM
_SEL
TEST
RESET2
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
COM3
COM2
COM1
COM0
*
SEG14
SEG13
SEG6
SEG5
XOUT
SEG4
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V3 V2
V1
C1
C0
TEST
VREFH
FOK_I
AM
UTE_O
VCC2ON_O
XRST_O
SCK_O
AD_CHGM
NT
AD_BATM
NT
HOLD_I
MSDTO_O
(SENS)MSDTI_I
XBUSY_I
SCOR_I
BEEP_O
<VDD_EEPROM>
CM
PON_I
SEG15
XW
AKEUP_O
<PGMSI_I>
<PGMSEL_O>
POFF_O
AD_SEL
(P13/PW
M4)
(P50)
XPOWLT_O
TSB
(P42)
FRANCE_I
W
P/AD_DCINM
NT
W
P/AD_RMKEY
C2POEN_O
XIN_I
GFS_I
XRESET_I
AVCPU
VCPU
XSTOP
HPSW_O
R/XW_O
W
P/XOPEN
XNONCHG_I
GND
ESPLT_O
PGM_SDTO
PGM
_SCK
X4M
/16M
_I
W
P/AD_KEY_1
XOPSTBY_O
OPG4_O
AD_KEY_2
(P44)
DEFECT_I
(DFCT_CTRL_O)
XTSB/PANA-HP_I
VDD
(
(
VOL-
VOL+
SOUND
MENU
SYSTEM CONTROL
MICON
HOLD
ON
OFF
ON
OFF
ESP
LIQUID
CRYSTAL
DISPLAY
LCD801
*C806
0.0047
0
CHECK
OPEN:NORMAL MODE
SHORT:TEST MODE
E353,E355
FR
E351,351SR,E353
E355,E356CK