HCD-CX4iP/CX5iP
34
• IC Pin Function Description
BD94D-V BOARD IC101 TC94A70FG-101 (CD-MP3 PROCESSOR)
Pin No. Pin Name I/O Description
1 AVSS3 - Ground terminal
2 RFZI I RF ripple zero crossing signal input terminal
3 RFRP O RF ripple signal output terminal
4 SBAD O Sub beam addition signal output terminal Not used
5 FEO O Focus error signal output terminal Not used
6 TEO O Tracking error signal output terminal
7 TEZI I Tracking error zero crossing signal input terminal
8 AVDD3 - Power supply terminal (+3.3V)
9 FOO O Focus coil drive signal output terminal
10 TRO O Tracking coil drive signal output terminal
11 VREF I Reference voltage (+1.65V) input terminal
12 FMO O Sled motor drive signal output terminal
13 DMO O Spindle motor drive signal output terminal
14 VSSP3 - Ground terminal
15 VCOI I VCO control voltage input terminal
16 VDDP3 - Power supply terminal (+3.3V)
17 VDD1 - Power supply terminal (+1.5V)
18 VSS1 - Ground terminal
19 FGIN I FG signal input terminal Not used
20 IN_SW I Disc inner position detection signal input terminal Not used
21 /DFCT O Not used
22 XVSS3 - Ground terminal
23 XI I System clock input terminal (16.9344 MHz)
24 XO O System clock output terminal (16.9344 MHz)
25 XVDD3 - Power supply terminal (+3.3V)
26 DVSS3 - Ground terminal
27 ROUT O Audio data (R-ch) output terminal Not used
28 DVDD3 - Power supply terminal (+3.3V)
29 DVR O Reference voltage (+1.65V) output terminal Not used
30 LOUT O Audio data (L-ch) output terminal Not used
31 DVSS3 - Ground terminal
32 VDDT3 - Power supply terminal (+3.3V)
33 VSS1 - Ground terminal
34 VDD1 - Power supply terminal (+1.5V)
35 VDDM1 - Power supply terminal (+1.5V)
36 SRAMSTB I S-RAM standby mode control signal input terminal Fixed at “L” in this set
37 XRST I Reset signal input from the system controller “L”: reset
38 to 41 BUS0 to BUS3 I Serial data input from the system controller
42 BUCK I Serial data transfer clock signal input from the system controller
43 XCCE I Chip enable signal input from the system controller
44 TEST I Setting terminal for test mode Normally fi xed at “L”
45 IRQ I Interrupt request signal input terminal Not used
46 ST_REQ/CKO O Request signal output terminal Not used
47 AOUT2 O Audio data output terminal Not used
48 REQ O Request signal output terminal Not used
49 PIO1/ST_REQ O Request signal output terminal Not used
50 PIO2 O Not used
51 GATE I Gate signal input terminal
52 VSS1 - Ground terminal
53 VDDT3 - Power supply terminal (+3.3V)
54 SBSY O Subcode block sync signal output to the system controller
55 FOK O Not used
56 IPF O Not used
57 /LOCK O Not used
58 ZDET O Zero detection signal output terminal Not used
59 GPIN I Not used
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