Sony ICF-6800W - Page 16

FREQUENCY
TO BE
MEASURED
1MHz ‘ONTROL
REFERENCE 7) Si
SIGNAL
ICF-6800W |
IC8 (divider)
This divider is provided to divide the 10 MHz
generated by Q50 to 1 MHz; it is a 1/10 divider.
Q50 is a crystal oscillator, and so it provides
extremely stable oscillation. It is used to formulate
the control and gate signals for the counter.
IC4 (Counter)
Basic Operation of IC4 Counter (Refer to Fig. 32)
When a signal whose frequency is to be measured
is applied to terminal. 1, this signal enters. the
gate circuit. A reference frequency of 1MHz
is applied to
applied to the control-signal generator ghrough the
divider. This signal is further divided in the
control-signal generator so that a pulse lasts for a
second as shown in Fig. 33-b. Actually, a display
down to 1 kHz in AM and100 kHz in FM is sufficient.
Thus, pulses in AM and in FM are set to be 320
COUNTER
1/4 DIVIDER)
IGNAL
ENERATOR
terminal 7, and this signal is.
msec and 0.8 msec respectively. This signal from
the control-signal generator is applied to the
gate circuit. This signal is referred to as the gate
signal. The gate circuit acts as an AND circuit,
and an output signal appears when both @ and
() are at the same level. This output signal is
divided and counted by the decimal counter,
As shown in Fig. 33,6 pulses counted for a dura-
tion of 1 second make up the frequency 6 Hz.
Actually, high frequencies on the order of several
score MHz are received. Since the gate signal
lasts for a second, the decimal counter must
count pulses on the order of 10°. Therefore,
an extremely high-speed counter is essential.
The, gate signal and the frequency to be measured
are divided in the same proportion and counted.
This method is called ‘‘Prescaling’’.
MULTI Ce ea
PLEXER SEGMENT
DECODER
ZERO
SUPPRESSOR}
SEGMENT DRIVER
IDECIMAL
COUNTER
DECIMAL
COUNTER
DECIMAL
COUNTER
COUNTER
DIGIT DRIVER
@) FREQUENCY
TO BE
MEASURED
Fig. 32
7 sec.
aL —§~|
() GATE SIGNAL sal a
factually 160 msec.)
Fig. 33.
—16—
reset time
(40 msec.)
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