Sony ICF-6800W - Page 17

Decimal Counter
The signal generated above is applied to the
decimal counter and its frequency is counted. The
decimal counter returns to 0 after counting from 0
to 9, and “1” of 10 is displayed on the next LED.
Below, an explanation of the operation of
the decimal counter will be given using an example
of a decimal counter on the Master-Slave system
(negative going trigger).
In this method as shown in Fig. 34 the counter
reads the signal while the input signal is at a higher
level, as indicated by the heavy line, and generates
signals according to the truth value table in Fig. 35
when the input signal changes from the high to the
low level as indicated by the arrow.
The signal to be measured is applied to input
A. Output D is connected to input A of the next
counter, and the next counter displays 1 when the
count changes from 9 to 10.
Output D becomes 1 at 8 of the truth value
table, but the next counter does not display I. The
reason for this is that the signal to input A of the
next counter is at a high level for both 8 and 9
and only goes low when the signal changes to a low
level after 9.
At this instance, the input A of the next counter
becomes | and the tenth display displays ‘“1”’.
The frequency is measured by using this tech-
nique.
The signals (outputs from A, B, C, D mentioned
above) from the decimal counters are sent to the
latch circuit immediately after the counting.
When the gate turns on and off once and the
counting goes off, all the decimal counters are reset
to 0 for the next counting.
oa ee ed a ee A
Fig. 34.
TO
COUNTER
247-2
| ICF-6800W
TRUTH VALUE TABLE
reset
OUTPUTS
COUNTED
OUTPUTS
COUNTED
DECIMAL
COUNTER
1ST DIGIT| A
DECIMAL
COUNTER
A
2ND DIGIT
NEXT
JUL
FREQUENCY
Fig. 35 TO BE COUNTED
Latch Circuit (Refer to Fig. 36)
The result of the decimal count is put im the
memory of the latch circuit when the gate signal
is terminated. The purpose of the latch circuit is to
hold certain information for a certain period of time.
In general, the latch circuit is made up of D
type flip-flops.
Without the latch circuit, the display of the
counter changes successively from 0 to 9 is the
counter counts pulses while the gate is open, The
display becomes held and readable only whmn the
gate is closed. The display returns to 0 when: reset
signal is received and starts counting the puwilses
again as the gate opens. This operation is repeated
without stopping.
Therefore, with the latch circuit the ds>play
is held when the counting is over and contimess to
be so even when the reset signal is received. The
display changes to show the results of the mext
count only when the next count is finished.