Sony STR-DG710 - Integrated Circuit Block Diagrams (Continued); HDMI RE Board IC Block Diagrams (Part 2)

51
STR-DG710
IC3521 SN74LV4052APWR (HDMI RE Board (1/2))
IC3504 SN74LV4052APWR (HDMI RE Board (2/2))
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y0
1Y2
VCC
1Y1
1-COM
1Y0
1Y3
A
B
GND
GND
INH
2Y1
2Y3
2-COM
2Y2
IC3513 SII9030CTU-7 (HDMI RE Board (2/2))
41
48
49
29
1
30
61
24
CI2CA
IOVCC
47 IOGND
46 CGND
45 CVCC18
D23
50 D22
51 D21
52 D20
53 D19
54 D18
55 D17
56 D16
57 D15
58 D14
59 CVCC18
60 CGND
TX0–
HSYNC
2VSYNC
3CGND
4CVCC18
5SPDIF
6MCLK
7SD3
8SD2
9SD1
10SD0
11WS
12SCK
13IOVCC
14IOGND
15CGND
16CVCC18
17INT
18HPD
19DSDA
20DSCL
TX0+
D13
62
D12
63
D11
64
D10
65
D9
66
IDCK
67
D8
68
D7
69
D6
70
D5
71
IOVCC
72
IOGND
73
CGND
74
CVCC18
75
D4
76
D3
77
D2
78
D1
79
D0
80
DE
EXT_SWING
25
AGND
34
AVCC
37
AGND
38
PVCC2
39
PGND2
40
NC
31
AGND
28
AVCC
23
PVCC1
22
PGND1
21
RSVDL
42
RESET
43 CSCL
44 CSDA
32 33
TX1– TX1+
35 36
TX2– TX2+
26 27
TXC– TXC+
I2C
SLAVE
E-DDC
MASTER
RECEIVER SENS
+ INTERRUPT LOGIC
VIDEO DATA CAPTURE / DE GEN / 656 LOGIC BLOCK
AUDIO DATA
CAPTURE
LOGIC
BLOCK
REGISTERS
CONFIGURATION
LOGIC BLOCK
PANEL LINK
TMDS
DIGITAL CORE
XOR
CSC
4: 2: 2
TO
4: 4: 4
HDCP
KEYS
EEPROM
HDCP
ENCRYPTION
ENGINE