Sony Trinitron KV-29FX65E - Block Diagram (2)

3
1
IC6355
ROTATION PRE-AMPLIFIER
2
5
7
6
3
2
IC6356
ROTATION POWER AMPLIFIER
4
6
8
7
3
1
IC6351
QP SIGNAL SHAPING
2
5
7
6
5
IC6352
QP OUTPUT DRIVE STAGE
6
3
1
2
6
-
+
7
IC6350
QP SIGNAL SHAPING
5
3
+
-
1
2
+
-
1
IC6103
HORIZONTAL LINEARITY & INNER PIN CONTROL
6
-
+
7
5
5
+
-
7
IC6101
HORIZONTAL DRIVE PULSE GENERATOR
6
2
-
+
1
3
2
+
-
1
IC6100
HORIZONTAL DRIVE PULSE GENERATOR
3
5
-
+
7
6
5
+
-
7
IC6102
ACTIVE HORIZONTAL SIZE
ADJUSTMENT CONTROL
6
2
-
+
1
3
SWITCH
Q6104
Q6106
A5
B20
B13
SWITCH
Q6104
Q6106
A7
A9
3
2
14
9
8
5
6
3
A24
+
-
2
3
6
CY AMP
Q6253,
6254
1
3
A22
A23
B25
A25
B16
B5
QP OUT
Q6358
B15
+12V
5
2
6
4
7
1
6
8
IC6302
D/A FOR FOCUS, ROTATION , `H' TRAP
3
CN6502
CN6601
(2/2)
CN6622
A14
CN6601
(1/2)
IC6251
O/P DRIVE STAGE FOR DYNAMIC
CONVERGNCE
IC6250
MAIN HDY & VDY CONVERGANCE CONTROLLER
IC6354
`H' TRAP MULTIPLEXER/SIGNAL
CONDITIONER & `H' LIN
7
ABL1
E/W
HP2
HDIN
17
16
HD
VSTST
SCL
SDA
HSTAT
REFVOUT
HDYCON
VSAW
B3
A4
SCL
SDA2
HP1
EX PARA
VFB
V PROT
Q6403, Q6404
Q6402, Q6401
TO D BOARD
CN6600
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
P4
P7
P5
P2
P6
3
1
CN6633
DF DRIVE
V PROT
QP-
VM MOD
L IN
IN PIN
HD1OUT
HD2OUT
TO
ROTATION
COIL
CY+
CY-
TO D BOARD
CN6600
TO VM BOARD
CN6502
+5V
D1 ( )
DEFLECTION
U MAIN IN
Y 100
U 100
RESET 100
A20
H-PULSE MAIN IN
A19
V-PULSE MAIN IN
A16
A17
A18
A2
A3
A4
A6
B1
A1
TO A BOARD
CN1200
IC3302
71
51
72
52
54
53
59
60
62
26
61
28
79
76
30
74
66
22
9
68
70
7
20
32
47
24
64
63
VP100
HP100
SWITCH
Q3300
A5
4
5
3
9
35
36
34
37
39
40
38
41
43
44
42
45
21
19
35
36
34
37
39
40
38
41
43
44
42
1
17
16
18
15
13
12
14
11
9
8
10
7
13
12
14
11
9
8
10
7
5
4
6
3
25
37
36
38
35
33
32
34
31
29
28
30
27
17
15
16
24
18
23
26
VM-OUT/MUTE
V 100
V MAIN IN
Y MAIN IN
HRD
PFD-INH
LLD
HRD
PFD-INH
LLD
CN2100
VP50
LLD
P1.1
HRD
HA
BLND
UP-RST
U50IN
V50IN
Y-OUT
U-OUT
V-OUT
WE
SWCK
RSTW
RE
JE2
Y50IN
Y50
U50
V50
Y100
U100
V100
Y0IN
U1IN
U0IN
V1IN
V0IN
Y1IN
Y6IN
Y5IN
Y4IN
Y3IN
Y2IN
Y7IN
VDEF
HDEF
Y3OUT
Y4OUT
Y5OUT
Y6OUT
Y7OUT
U0OUT
U1OUT
Y0OUT
Y1OUT
Y2OUT
V0OUT
V1OUT
IC3303 IC3304
U2
U2
V2
V2
V1
V1
U1
U1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
V1
V1
U1
U1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
Y1
V3
V3
U3
U3
Y3
Y3
Y3
Y3
Y3
Y3
Y3
Y3
V3
V3
U3
U3
Y3
Y3
Y3
Y3
Y3
Y3
Y3
Y3
Y3OUT
Y4OUT
Y5OUT
Y6OUT
Y7OUT
U0OUT
U1OUT
Y0OUT
Y1OUT
Y2OUT
V0OUT
V1OUT
Y7IN
Y2IN
Y3IN
Y4IN
Y5IN
Y6IN
Y1IN
V0IN
V1IN
U0IN
U1IN
Y0IN
WEIN
VPULSE
YOUT0
UOUT1
UOUT0
VOUT1
VOUT0
YOUT5
YOUT4
YOUT3
YOUT2
YOUT1
YOUT7
YOUT6
YIN7
YIN2
YIN3
YIN4
YIN5
YIN6
YIN1
VIN0
VIN1
UIN0
UIN1
YIN0
RSTR
Y2
Y2
Y2
Y2
Y2
Y2
Y2
Y2
U2
U2
V2
V2
WE
SWCK
RSTN
RE
IE
OE
SRCK
55
56
58
57
Y2
Y2
Y2
Y2
Y2
Y2
Y2
Y2
IC3301
B2 ( )
100 MHz
39 40 41
42
5-1. BLOCK DIAGRAMS (3)