ST NUCLEO-F439ZI - Page 30

Hardware layout and configuration UM1974
30/82 DocID028599 Rev 7
SB111 (NRST)
ON
Board RESET signal (NRST) is connected to ST-LINK reset control I/O
(T_NRST).
OFF
Board RESET signal (NRST) is not connected to ST-LINK reset control
I/O (T_NRST).
SB113, SB114 (IOREF)
OFF, ON IOREF is connected to +3.3 V.
ON, OFF IOREF is connected to +3.3V_PER.
SB116 (SDMMC_D0),
SB117 (SDMMC_D1)
ON These pins are connected to ST morpho connector CN12.
OFF
These pins are disconnected from ST morpho connector CN12 to avoid
stub of SDMMC data signals on PCB.
SB120, SB119 (LD1-LED)
ON, OFF Green user LED LD1 is connected to PB0.
OFF,ON Green user LED LD1 is connected to D13 of Arduino signal (PA5).
OFF, OFF Green user LED LD1 is not connected.
ON,ON Forbidden
SB139 (LD2-LED)
ON Blue user LED LD2 is connected to PB7.
OFF Blue user LED LD2 is not connected.
SB118 (LD3-LED)
ON Red user LED LD3 is connected to PB14.
OFF Red user LED LD3 is not connected.
SB121, SB122 (D11)
ON, OFF
D11 (Pin 14 of CN7) is connected to STM32 PA7
(SPI_A_MOSI/TIM_E_PWM1).
OFF,ON
D11 (Pin 14 of CN7) is connected to STM32 PB5
(SPI_A_MOSI/TIM_D_PWM2).
SB144,145
(X2 crystal)
OFF
PC14, PC15 are not connected to ST morpho connector CN11.
(X2 used to generate 32KHz clock).
ON
PC14, PC15 are connected to ST morpho connector CN11.
(R37 and R38 should be removed).
SB148 (PF0/PH0), SB163
(PF1/PH1) (Main clock)
OFF, ON
PF0/PH0 is not connected to ST morpho
PF1/PH1 is connected to ST morpho connector CN11
(MCO is used as main clock for STM32 on PF0/PH0).
OFF, OFF
PF0/PH0, PF1/PH1 are not connected to ST morpho connector CN11
(X3, C37, C38, SB8 and SB9 provide a clock as shown in
Section Appendix A: Electrical schematics. In this case SB149 must be
removed).
ON, ON
PF0/PH0 and PF1/PH1 are connected to ST morpho connector CN11.
(SB8, SB9 and SB149 must be removed).
SB112, SB149 (MCO)
ON
MCO of ST-LINK (STM32F103CBT6) is connected to PF0/PH0 of
STM32.
OFF
MCO of ST-LINK (STM32F103CBT6) is not connected to PF0/PH0 of
STM32.
Table 12. Solder bridges (continued)
Bridge State
(1)
Description
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