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ST STM32F103xx series User Manual

ST STM32F103xx series
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Reading/programming the embedded Flash memory PM0075
16/31 Doc ID 17863 Rev 1
Figure 3. Flash memory Mass Erase procedure
2.3.5 Option byte programming
The option bytes are programmed differently from normal user addresses. The number of
option bytes is limited to 8 (4 for write protection, 1 for read protection, 1 for configuration
and 2 for user data storage). After unlocking the FPEC, the user has to authorize the
programming of the option bytes by writing the same set of KEYS (KEY1 and KEY2) to the
FLASH_OPTKEYR register to set the OPTWRE bit in the FLASH_CR register (refer to
Section 2.3.1 for key values). Then the user has to set the OPTPG bit in the FLASH_CR
register and perform a half-word write operation at the desired Flash address.
FPEC preliminarily reads the value of the addressed option byte and checks that it has been
erased. If not, the program operation is skipped and a warning is issued by the WRPRTERR
bit in the FLASH_SR register. The end of the program operation is indicated by the EOP bit
in the FLASH_SR register.
The FPEC takes the LSB and automatically computes the MSB (which is the complement of
the LSB) and starts the programming operation. This guarantees that the option byte and its
complement are always correct.
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ST STM32F103xx series Specifications

General IconGeneral
BrandST
ModelSTM32F103xx series
CategoryController
LanguageEnglish

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