ST STM32F205 User Manual

June 2013 DocID15687 Rev 5 1/29
PM0059
Programming manual
STM32F205/215, STM32F207/217 Flash programming manual
Introduction
This programming manual describes how to program the Flash memory of STM32F205/215
and STM32F207/217 microcontrollers. For convenience, these will be referred to as
STM32F20x and STM32F21x in the rest of this document unless otherwise specified.
The STM32F20x and STM32F21xembedded Flash memory can be programmed using in-
circuit programming or in-application programming.
The in-circuit programming (ICP) method is used to update the entire contents of the
Flash memory, using the JTAG, SWD protocol or the boot loader to load the user application
into the microcontroller. ICP offers quick and efficient design iterations and eliminates
unnecessary package handling or socketing of devices.
In contrast to the ICP method, in-application programming (IAP) can use any
communication interface supported by the microcontroller (I/Os, USB, CAN, UART, I
2
C, SPI,
etc.) to download programming data into memory. With IAP, the Flash memory can be re-
programmed while the application is running. Nevertheless, part of the application has to
have been previously programmed in the Flash memory using ICP.
The Flash interface implements instruction access and data access based on the AHB
protocol. It implements a prefetch buffer that speeds up CPU code execution. It also
implements the logic necessary to carry out Flash memory operations (program/erase).
Program/erase operations can be performed over the whole product voltage range.
Read/write protections and option bytes are also implemented.
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ST STM32F205 Specifications

General

Brand	ST
Model	STM32F205
Category	Microcontrollers
Language	English

Summary

Introduction to Flash Programming

Glossary of Terms and Abbreviations

STM32 Flash Memory Interface

Flash Memory Interface Introduction

Manages CPU AHB I-Code and D-Code accesses to the 1 Mbyte Flash memory and implements erase/program operations.

Flash Memory Interface Main Features

Covers read operations, program/erase, read/write protections, prefetch, and cache lines.

Flash Memory Organization and Capacity

Details capacity, data width, sector/mass erase, and memory organization into sectors.

Flash Memory Read Interface

Covers wait states, CPU clock frequency, and ART Accelerator™ for read operations.

Flash Memory Erase and Program Operations

Details sequences for unlocking registers, program/erase parallelism, sector/mass erase, and programming.

Flash Option Bytes Management

Describes user option bytes, their organization, programming, read protection (RDP), and write protections.

One-Time Programmable (OTP) Bytes

Describes the organization and programming of the one-time programmable (OTP) part of the OTP area.

Flash Interface Registers Overview

Details registers like FLASH_ACR, FLASH_KEYR, FLASH_OPTKEYR, FLASH_SR, FLASH_CR, and FLASH_OPTCR.

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