ST STM32F205

List of figures
4/29 DocID15687 Rev 5
List of figures
Figure 1. Flash memory interface connection inside system architecture . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Sequential 32-bit instruction execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 3. RDP levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18