Hardware layout and configuration UM1879
18/41 UM1879 Rev 4
10.3 Clock source
The STM32L476VGT6 MCU uses:
• A 32.768 KHz low-speed source:
– By default, the X3 crystal on board
– From an external oscillator through P2 header (pin 7 labeled ‘PC14’). The
configuration needed is:
SB19 opened, SB20 closed, R26 removed
• A system clock source:
– By default, generated by an internal STM32L476VGT6 oscillator. The
configuration needed is:
SB18 opened, SB21 and SB22 closed
– Or driven by an X2 Crystal on board (not fitted). The configuration needed is:
SB18, SB21 and SB22 opened
X2, R88, R89, C77, C78 fitted
– Or driven by a MCO signal (8MHz) from the ST-LINK MCU STM32F103CBT6
(U3).The configuration needed is:
SB18 closed, SB22 opened
R89 not fitted
– Or driven externally from PH0 through the P2 header, pin 9 labeled ‘PH0’.The
configuration needed is:
SB22 closed, SB18 opened
R89 not fitted
Note: Refer to Oscillator design guide for STM8S, STM8A and STM32 microcontrollers
Application note (AN2867).
10.4 Reset source
The reset signal NRST of the STM32L476 Discovery board is low active and the reset
sources include:
• The reset button B1, connected by default to NRST (SB23 closed)
• The embedded ST-LINK/V2-1
• The external reset pin 11 of P2 header connector, labeled ‘NRST’
• The external reset from SWD connector CN4, pin 5
Table 5. Reset related jumper
Jumper Description
JP3
When JP3 is closed, the SWD connector CN4 pin 5 and the embedded
ST-LINK/V2-1 are connected to NRST.
Default Setting: closed
JP3 is opened, no connection between CN4 and ST-LINK/V2-1 to
NRST. This must be used when the ST-LINK/V2-1 is not powered (i.e
STM32L476 Discovery board) is powered by the CR2032 battery
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