Supermicro Supero X9DRi-LN4F+ - Page 84

4-10
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Intel I/OAT
The Intel I/OAT (I/O Acceleration Technology) signicantly reduces CPU over-
head by leveraging CPU architectural improvements, freeing the system resource
for other tasks. The options are Disabled and Enabled.
DCA Support
Select Enabled to use Intel's DCA (Direct Cache Access) Technology to improve
data transfer efciency. The options are Enabled and Disabled.
MMCFG(MemoryMappedConguration)BASE
This item allows the user to set the default PCI MMIO base address. The lower
the MMIO base address is, the less available the system memory is in a 32-bit
OS. The default setting is [0x80000000].
IIO 1 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
Uplink Link Speed
This feature allows the user to select target link speed. The options are Gen1
(Generation 1), Gen2 and Gen3.
CPU1 Slot2 PCI-E 3.0 x4 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
CPU1 Slot3 PCI-E 3.0 x16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
CPU1 Slot1 PCI-E 3.0 x16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
IIO 2 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
CPU2 Slot6 PCI-E 3.0 x8 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.