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Supermicro SUPERSERVER 6029BT-HNC0R - Page 75

Supermicro SUPERSERVER 6029BT-HNC0R
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Chapter 6: BIOS
75
side.) If this feature is set to Disable, tCCD_L will be enforced based on the memory
frequency. The options are Enable and Disable.
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.
2X REFRESH
This option allows the user to select 2X refresh mode. The options are Auto, Enabled,
and Disabled.
Memory Topology
This feature displays DIMM population information.
Memory RAS Conguration
Static Virtual Lockstep Mode
Select Enable to run the system's memory channels in lockstep mode to minimize memory
access latency. The options are Disable and Enable.
Mirror Mode
This feature allows memory to be mirrored between two channels, providing 100% re-
dundancy. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
UEFI ARM Mirror
This options allows the system to imitate the behavior of the UEFI based Address Range
Mirror with setup option. The options are Disable and Enable.
Memory Rank Sparing
Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.
Correctable Error Threshold
Use this item to specify the threshold value for correctable memory-error logging, which
sets a limit on the maximum number of events that can be logged in the memory-error
log at a given time. The default setting is 10.
SDDC Plus One
Single Device Data Correction (SDDC) organizes data in a single bundle (x4/x8 DRAM).
If any or all the bits become corrupted, corrections occur. The x4 condition is corrected
on all cases. The x8 condition is corrected only if the system is in Lockstep Mode. The
options are Disable and Enable.

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