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Supermicro SuperServer E300-9D-4CN8TP - Page 53

Supermicro SuperServer E300-9D-4CN8TP
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Chapter 5: UEFI BIOS
53
Power Performance Tuning
This feature allows the user to set whether the operating system or the BIOS controls
the Energy Performance BIAS (EPB). The options are OS Controls EPB and BIOS
Controls EPB.
*If the feature above is set to BIOS Controls EPB, the following features will be
available for conguration:
ENERGY_PERF_BIAS_CFG Mode
    
and perfomance settings. Select Maximum Performance to set the highest performance.
       󰀩  
Perfomance to prioritize performance optimization while conserving energy. Select Bal-
anced Power to prioritize energy conservation while maintaining good performance.
󰀩
Performance, Performance, Balanced Performance, Balanced Power, and Power.
CPU P State Control

SpeedStep (Pstates)
         -
age and core frequency to reduce power consumption and heat dissipation. The options
are Disable and Enable. If this feature is set to Disabled, the next two features are not

Cong TDP
             
Nominal, Level 1, and Level 2.
EIST PSD Funtion
This feature allows the user to choose between Hardware and Software to control the
processor's frequency and performance (P-state). In HW_ALL mode, the processor hard-
ware is responsible for coordinating the P-state, and the OS is responsible for keeping the
P-state request up to date on all Logical Processors. In SW_ALL mode, the OS Power
Manager is responsible for coordinating the P-state, and must initiate the transition on
all Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for
coordinating the P-state and may initiate the transition on any Logical Processors. The
options are HW_ALL, SW_ALL, and SW_ANY.

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