Supermicro X10DRi - Page 95

Chapter 4: AMI BIOS
4-25
•ME Firmware Status #2
•Current State
•Error Code
Altitude
This feature indicates the altitude of the platform this machine is located above the
sea level. The value is shown in meters. If the value is unknown, enter the number
"80000000".
MCTP (Management Component Transport Protocol) Bus Owner
This feature indicates the location of the MCTP Bus owner. Enter 0s to all elds to
disable the MCTP Bus owner

PCIe/PCI/PnP Conguration
The following PCI information will be displayed:
•PCI Bus Driver Version
•PCI Latency Timer
PCI Latency Timer
Use this item to congure the PCI latency timer for a device installed on a PCI bus.
Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are 32,
64, 96, 128, 160, 192, 224 and 248 (PCI Bus Clocks).
PERR# Generation
Select Enabled to allow a PCI device to generate a PERR (PCI/PCI-E Parity Error)
number for a PCI bus error event. The options are Enabled and Disabled.
SERR# Generation
Select Enabled to allow a PCI device to generate an SERR (System Error) number
for a PCI bus error event. The options are Enabled and Disabled.
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Enabled and Disabled.