Supermicro X10DRL-i SUPERO - Page 92

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X10DRL-i Motherboard User’s Manual
•ME Firmware Status #2
•Current State
•Error Code
PCIe/PCI/PnP Conguration
The following PCI information will be displayed:
•PCI Bus Driver Version
PCI Latency Timer
Use this item to congure the PCI latency timer for a device installed on a PCI bus.
Select 32 to set the PCI latency timer to 32 PCI clock cycles. The options are 32,
64, 96, 128, 160, 192, 224 and 248 (PCI Bus Clocks).
PCI-X Latency Timer
Use this item to congure the PCI-X latency timer for a device installed on a PCI -X
bus. Select 32 to set the PCI-X latency timer to 32 PCI-X clock cycles. The options
are 32, 64, 96, 128, 160, 192, 224 and 248 (PCI Bus Clocks).
VGA Palette Snoop
Select Enabled to support VGA palette register snooping which will allow a PCI
card that does not contain its own VGA color palette to examine a video card pal-
ette and mimic it for proper color display. The options are Disabled and Enabled.
PCI AER (Advanced Error-Reporting) Support
Select Enabled to support Advanced Error-Reporting for onboard PCI devices. The
options are Disabled and Enabled.
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Enabled and Disabled.
SR-IOV (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Enabled
and Disabled.