Theory of Operation—2213 Service
the Swp Z-Axis current already present from CR622 to
intensify the display. The non-intensified portion of the
trace indicates the amount o f total delay time.
DLY'D. In this position of HORIZONTAL MODE
switch S650, the start of the sweep is delayed by the
amount of time established by the Delay circuit. When a
trigger signal clocks U603B to produce a HI Swp Gate
signal on U603B pin 9, the delay time is started. The HI is
applied to the base of Q624 via R613 to bias that transistor
off. Transistor Q624 is used as a switch across the delay
timing capacitors. When biased on, the transistor keeps the
timing capacitors discharged. When the transistor is biased
off, the delay timing capacitors are allowed to charge. Both
the amount of capacitance and the charging voltage are con
trolled by DELAY TIME switch S660. The DELAY TIME
switch also controls the voltage range applied to MULTI
PLIER potentiomter R658.
For the longest delay-time range (0.2 ms), S660 switches
C622 in parallel with C624. When switched to the 10-/lis
delay position, C622 is out of the delay timing circuit.
Finally, in the 0.5-/us position, additional charging current
is supplied to C664 via R692 to increase the charging rate,
and +8.6 V is applied to the MULTIPLIER potentiometer
via R600. The increased voltage changes the control range
available at the wiper of R658.
At the start of the delay time, U603B pin 8 goes LO.
This removes the positive bias from Q632, and the emitter
voltage of Q632 becomes near ground potential. As the
delay timing capacitor charges, the base of Q632 remains at
a constant voltage, therefore the base of Q652 goes negative.
When the base of comparator transistor Q652 reaches a
more negative level than the base of comparator transistor
Q644 (set by the MULTIPLIER control), Q652 starts to
switch off and Q644 starts to switch on. The collector
voltage drop of Q644 is coupled back to the emitter of
Q632 via R641 to complete the switching action. The
collector voltage of Q652 rises to a HI logic level which
is applied to Sweep Logic Gate U620 on pins 3 and 13. The
HI is ANDed with the HI Swp Gate signal already present
to produce a LO output at U620 pin 6 and pin 8. The LO
at pin 6 initiates a Sweep, and the LO at pin 8 unblanks
the crt.
In the DLY'D Mode, pin 12 of U607D is LO, so pin 11
will be HI to bias CR619 on and CR621 off (Figure 3-6).
This action prevents intensifying current from reaching the
Z-Drive line during the DLY'D Sweep display.
During Sweep retrace time, CR621 is biased off by the
HI applied to CR668 from U603B pin 8 to keep the crt
blanked off.
AUTO INTENSITY
AND Z-AXIS AMPLIFIER
Auto Intensity
The purpose of the Auto Intensity circuit, shown in
Diagram 6, is to keep the intensity of the trace on the crt
at a constant level with changing sweep speeds and trigger
signal repetition rates. In conventional oscilloscopes, as
the duty cycle of the displayed trace changes, the intensity
will vary. The Auto Intensity circuit compensates for this
effect by increasing the Z-Axis Drive voltage for low Sweep
duty factors. The elements of the Auto Intensity circuit
consist of four blocks: the duty-cycle averager, the boost-
factor converter, the intensity-control multiplier, and the
crt triode compensation circuit. The duty-cycle averager
consists of an electronic switching circuit composed of
U825A, U825B, and U825C. The Swp Duty signal that is
applied to U825B pin 11 causes the output voltage at pin
14 to be switched between ground and +5 V. The output
voltage of U825B is averaged by R821 and C821 and
applied to U835A pin 3 via U825C.
As the sweep duty factor decreases, the crt beam current
must be increased to maintain a constant intensity. To
accomplish the task, the boost-factor converter increases
the drive in inverse proportion to the duty factor of the
trace being displayed.
Amplifier U835A is a high-impedance voltage follower.
For 100% duty factor, the output voltage will be approxi
mately zero. Decreasing the duty factor to 10% results in
approximately 4.5 V output, and when no sweep occurs
(0% duty factor) the output will be 5 V. The output of
U835A is applied to a network consisting of CR828,
CR830, and resistors R827, R828, R829, R830, and R831.
This network produces an output current which is a non
linear function of the duty-factor voltage. For 10% duty
factor, the output current is 10 times greater than the
current at 100% duty factor. Maximum available boost
limits at a factor of about 25:1.
The nonlinear current is connected to the emitters of
the differential amplifier composed of Q811 and Q812.
The emitters of the two amplifier transistors are held at a
constant voltage by the action of Q813. AUTO INTEN
SITY control R807 is connected to the base of Q811 via
R811. It controls the portion of the boost current that goes
to the summing junction of U835B. Boost current is pro
portional to the true beam current required at the faceplate
of the crt.
The crt triode compensation circuit is an inverting
operational amplifier with nonlinear feedback. It is
composed of U835B, R834, R835, C834, and CR834.
Output voltage of the circuit changes in response to the
@
3-19
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