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2. General description
2.1 Composition
The block diagram of this System is shown in attached drawing. The program ROM contains a total
of 6 k bytes, consisting of 2732 × 1 and 2716 × 1; the RAM has 128 bytes built in the MPU and
2 k bytes of 2114 × 4; the video RAM operates on 2114.
The MPU (micro processing unit) is equivalent to Motorola MC6802 (the machine code is same as
MC6800), and clocks at 3.3792 MHz divided to 1/4 from 13.5168 MHz are fed from the EXTAL ter-
minal. Since the clocks are further divided to 1/4 in the MPU, the system finally operates on clocks
at 844.8 kHz. This clock at 844.8 kHz is delivered as E signal from pin 37 of MPU, and is given to a
peripheral device of this system as a synchronizing signal.
Equally important as E signal are VMA and R/W.
The VMA becomes TTL level H only when address data delivered from the MPU is valid; the R/W
becomes TTL level H when the MPU receives data from peripheral device and turns to TTL level L
when data is given from the MPU to peripheral device.
These data exchanges are synchronized with the change of E signal from TTL level H to TTL level L
when the VMA is at TTL level H.
Since the MC6802 is an eight-bit MPU (CPU), it can exchange data with peripheral device by way
of input/output terminals D0 to D7 of 8-bit bidirectional data.
For selection of address, there is an address data output terminal of 16 bits, but since the A15 of
higher position is not used in this system, the total address space is 32 kbytes.
For conversion from parallel to serial of sending data of RTTY and conversion from serial to parallel
of received data, a USART (universal synchronous/asynchronous receiver/transmitter) equivalent
to Intel 8251A is used, so that the transmission and reception may be operated simultaneously.
For data reading from the keyboard and data output to the printer, a PIA (peripheral interface
adapter) equivalent to Motorola MC6821 is used, and the data input and output are effected in the
parallel system of ASCII codes.
The screen display is controlled by the Hitachi HD46505S CRTC (CRT Controller) equivalent to Mo-
torola MC6845S. The CRTC can set the display format freely according to the command from the
CPU. In this system, a format of 32 characters/line by 20 lines is determined.
Since the CRTC, PIA, and USART do not operate unless the action is set immediately after the
power source is turned on or reset, the prescribed data is written in the first place in this System.
In the event of trouble in the MPU block, since this setting is not effected, nothing appears on the
display screen if the main power switch is turned on.
The method to judge whether the trouble is due to the MPU block or due to one of the devices or
input/output units connected to the device is mentioned later.
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