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Ten-Tec JUPITER
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time
functions.
The
display
screen
provides
the
operator
with
status
and
feedback
for
the
principal
and
subsidiary
controls,
and
a
selectable
menu
screen
displays
the
set-and-forget
controls.
The
81895
DC
&
МО
board
primarily
distributes
DC
power
to
the
other
boards
and
to
rear
panel
receptacles.
5.3.
Overall
Schematic
Figure
4-1
shows
the
interconnection
of
JUPITER’s
9
printed
wiring
board
subassemblies.
The
five
principal
boards,
Power
Amplifier,
Lowpass
Filter,
RF,
Logic,
and
DC&IO,
evolved
from
the
Ten-Tec
Pegasus
design.
The
Graphic
Display,
Keypad,
Front
Connectors,
and
Rear
Connectors
are
entirely
new.
There
are
18
numbered
cables
and
2
soldered
wires
interconnecting
the
boards.
Board-to-board
header
plugs
in
a
manner
similar
to
Pegasus
couple
the
Lowpass
Filter,
RF,
and
Logic
boards.
5.4.
КЕ
Board
P/N
81889
For
the
following,
refer
to
Figures
4-2
through
4-8
in
the
Schematics
chapter.
The
RF
board
schematic
comprises
an
overall
diagram,
Figure
4-2,
and
five
detail
parts
Figures
4-3
through
4-7.
5.4.1.1.
Local
Oscillator
Section
Jupiter’s
receiver
and
transmitter
are
triple-conversion
superheterodyne
designs
sharing
three
local
oscillators
Figure
4-3.
The
following
description
of
the
frequency
plan
takes
the
receiver
point-of-view,
but
applies
in
reverse
order
to
the
transmitter.
The
first
local
oscillator
is
a
phase-locked
loop
that
tunes
45.1
75
MHz
to
convert
the
signal
frequency
to
Ше
45
MHz
first
IF.
Tuning
data
comes
from
the
Logic
board
via
CLK,
serial
DATA,
and
EN_2
lines.
The
МСО
SEL
line
switches
from
the
04
VCO
to
the
Q2
VCO
at
a
5-2
transceiver
frequency
of
13.03
MHz.
1710
processes
the
control
signals,
the
reference
signal
from
TCXO
14,
and
the
VCO
samples
from
the
loop
buffer,
Q1.
The
circuit
surrounding
054-048
is
the
charge-pump
and
loop
filter,
while
Q7
buffers
the
15%
LO
output
to
the
receiver
and
transmitter
first
mixers.
The
14.8475
MHz
TCXO
reference
also
feeds
the
Q8
frequency
tripler
to
develop
the
44.5425
MHz
2nd_LO
for
the
second
mixers.
Crystal,
X1,
at
4.76
MHz
drives
a
divide-
by-ten
counter
at
U2
to
develop
the
476
kHz
3rd_LO.
5.4.1.2.
Receiver
Section
Figures
4-4
and
4-5
show
Jupiter's
receiver
schematic.
The
antenna
signal
from
the
Lowpass
board
encounters
а
common-mode
choke
at
T13
followed
by
a
PIN
diode
switched
attenuator,
К152,
R201
and
R202.
043,
052,
and
053
condition
the
attenuator
control
signal
from
the
Logic
board
to
levels
suited
to
switches,
D41
and
D47.
Common
control
signals,
DATA
and
CLK,
plus
EN
1
control
driver,
U17,
which
sources
the
band-select
lines
to
PIN
diode
switched
sub-octave
filters
between
C181
and
С148.
045,
054,
and
055,
form
а
parallel-
connected
high
dynamic
range
КЕ
amplifier
with
D21
as
a
gain
control
element.
0935
and
040,
with
associated
parts,
comprise
the
balanced
first
mixer,
fed
by
the
first
LO
to
develop
a
45
MHz
first
IF.
Monolithic
crystal
filter,
PLA
feeds
the
dual-gate
MOSFET
(038)
first
IF
amplifier.
Тһе
2"%_LO
signal
drives
the
double-balanced
mixer
formed
by
T8,
T10,
and
the
diode
pairs.
The
279
IF
centered
at
approximately
454
kilohertz
results.
74269
Second
Printing
JUPITER
Model
538
30
August
2001

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