Interrupt Controller (NVIC)
Description:
The specified interrupt is enabled in the interrupt controller. Other enables for the interrupt
(such as at the peripheral level) are unaffected by this function.
Returns:
None.
13.2.1.3 ROM_IntIsEnabled
Returns if a peripheral interrupt is enabled.
Prototype:
uint32_t
ROM_IntIsEnabled(uint32_t ui32Interrupt)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_INTERRUPTTABLE is an array of pointers located at ROM_APITABLE[14].
ROM_IntIsEnabled is a function pointer located at ROM_INTERRUPTTABLE[12].
Parameters:
ui32Interrupt specifies the interrupt to check.
Description:
This function checks if the specified interrupt is enabled in the interrupt controller.
Returns:
A non-zero value if the interrupt is enabled.
13.2.1.4 ROM_IntMasterDisable
Disables the processor interrupt.
Prototype:
bool
ROM_IntMasterDisable(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_INTERRUPTTABLE is an array of pointers located at ROM_APITABLE[14].
ROM_IntMasterDisable is a function pointer located at ROM_INTERRUPTTABLE[2].
Description:
Prevents the processor from receiving interrupts. This does not affect the set of interrupts
enabled in the interrupt controller; it just gates the single interrupt from the controller to the
processor.
Returns:
Returns true if interrupts were already disabled when the function was called or false if they
were initially enabled.
April 8, 2013 139