Interrupt Controller (NVIC)
13.2.1.5 ROM_IntMasterEnable
Enables the processor interrupt.
Prototype:
bool
ROM_IntMasterEnable(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_INTERRUPTTABLE is an array of pointers located at ROM_APITABLE[14].
ROM_IntMasterEnable is a function pointer located at ROM_INTERRUPTTABLE[1].
Description:
Allows the processor to respond to interrupts. This does not affect the set of interrupts enabled
in the interrupt controller; it just gates the single interrupt from the controller to the processor.
Returns:
Returns true if interrupts were disabled when the function was called or false if they were
initially enabled.
13.2.1.6 ROM_IntPendClear
Unpends an interrupt.
Prototype:
void
ROM_IntPendClear(uint32_t ui32Interrupt)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_INTERRUPTTABLE is an array of pointers located at ROM_APITABLE[14].
ROM_IntPendClear is a function pointer located at ROM_INTERRUPTTABLE[9].
Parameters:
ui32Interrupt specifies the interrupt to be unpended.
Description:
The specified interrupt is unpended in the interrupt controller. This will cause any previously
generated interrupts that have not been handled yet (due to higher priority interrupts or the
interrupt no having been enabled yet) to be discarded.
Returns:
None.
13.2.1.7 ROM_IntPendSet
Pends an interrupt.
Prototype:
void
ROM_IntPendSet(uint32_t ui32Interrupt)
140 April 8, 2013
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