UART
Prototype:
void
ROM_UARTFIFOEnable(uint32_t ui32Base)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UARTTABLE is an array of pointers located at ROM_APITABLE[1].
ROM_UARTFIFOEnable is a function pointer located at ROM_UARTTABLE[24].
Parameters:
ui32Base is the base address of the UART port.
Description:
This functions enables the transmit and receive FIFOs in the UART.
Returns:
None.
22.2.1.24 ROM_UARTFIFOLevelGet
Gets the FIFO level at which interrupts are generated.
Prototype:
void
ROM_UARTFIFOLevelGet(uint32_t ui32Base,
uint32_t
*
pui32TxLevel,
uint32_t
*
pui32RxLevel)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UARTTABLE is an array of pointers located at ROM_APITABLE[1].
ROM_UARTFIFOLevelGet is a function pointer located at ROM_UARTTABLE[4].
Parameters:
ui32Base is the base address of the UART port.
pui32TxLevel is a pointer to storage for the transmit FIFO level, returned as one of
UART_FIFO_TX1_8, UART_FIFO_TX2_8, UART_FIFO_TX4_8, UART_FIFO_TX6_8, or
UART_FIFO_TX7_8.
pui32RxLevel is a pointer to storage for the receive FIFO level, returned as one of
UART_FIFO_RX1_8, UART_FIFO_RX2_8, UART_FIFO_RX4_8, UART_FIFO_RX6_8, or
UART_FIFO_RX7_8.
Description:
This function gets the FIFO level at which transmit and receive interrupts are generated.
Returns:
None.
22.2.1.25 ROM_UARTFIFOLevelSet
Sets the FIFO level at which interrupts are generated.
262 April 8, 2013
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