Texas Instruments Tiva TM4C123GH6PM User Manual

UART
Prototype:
void
ROM_UARTFIFOLevelSet(uint32_t ui32Base,
uint32_t ui32TxLevel,
uint32_t ui32RxLevel)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UARTTABLE is an array of pointers located at ROM_APITABLE[1].
ROM_UARTFIFOLevelSet is a function pointer located at ROM_UARTTABLE[3].
Parameters:
ui32Base is the base address of the UART port.
ui32TxLevel is the transmit FIFO interrupt level, specified as one of UART_FIFO_TX1_8,
UART_FIFO_TX2_8, UART_FIFO_TX4_8, UART_FIFO_TX6_8, or UART_FIFO_TX7_8.
ui32RxLevel is the receive FIFO interrupt level, specified as one of UART_FIFO_RX1_8,
UART_FIFO_RX2_8, UART_FIFO_RX4_8, UART_FIFO_RX6_8, or UART_FIFO_RX7_8.
Description:
This function sets the FIFO level at which transmit and receive interrupts are generated.
Returns:
None.
22.2.1.26 ROM_UARTIntClear
Clears UART interrupt sources.
Prototype:
void
ROM_UARTIntClear(uint32_t ui32Base,
uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UARTTABLE is an array of pointers located at ROM_APITABLE[1].
ROM_UARTIntClear is a function pointer located at ROM_UARTTABLE[20].
Parameters:
ui32Base is the base address of the UART port.
ui32IntFlags is a bit mask of the interrupt sources to be cleared.
Description:
The specified UART interrupt sources are cleared, so that they no longer assert. This func-
tion must be called in the interrupt handler to keep the interrupt from being recognized again
immediately upon exit.
The ui32IntFlags parameter has the same definition as the ui32IntFlags parameter to
ROM_UARTIntEnable().
Note:
Because there is a write buffer in the Cortex-M4 processor, it may take several clock cycles
before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt
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Texas Instruments Tiva TM4C123GH6PM Specifications

General

Brand	Texas Instruments
Model	Tiva TM4C123GH6PM
Category	Microcontrollers
Language	English