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Texas Instruments Tiva TM4C123GH6PM User Manual

Texas Instruments Tiva TM4C123GH6PM
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uDMA Controller
Prototype:
void
*
ROM_uDMAControlAlternateBaseGet(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UDMATABLE is an array of pointers located at ROM_APITABLE[17].
ROM_uDMAControlAlternateBaseGet is a function pointer located at
ROM_UDMATABLE[21].
Description:
This function gets the base address of the second half of the channel control table that holds
the alternate control structures for each channel.
Returns:
Returns a pointer to the base address of the second half of the channel control table.
23.2.1.17 ROM_uDMAControlBaseGet
Gets the base address for the channel control table.
Prototype:
void
*
ROM_uDMAControlBaseGet(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UDMATABLE is an array of pointers located at ROM_APITABLE[17].
ROM_uDMAControlBaseGet is a function pointer located at ROM_UDMATABLE[9].
Description:
This function gets the base address of the channel control table. This table resides in system
memory and holds control information for each uDMA channel.
Returns:
Returns a pointer to the base address of the channel control table.
23.2.1.18 ROM_uDMAControlBaseSet
Sets the base address for the channel control table.
Prototype:
void
ROM_uDMAControlBaseSet(void
*
pControlTable)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_UDMATABLE is an array of pointers located at ROM_APITABLE[17].
ROM_uDMAControlBaseSet is a function pointer located at ROM_UDMATABLE[8].
Parameters:
pControlTable is a pointer to the 1024 byte aligned base address of the uDMA channel control
table.
292 April 8, 2013
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Texas Instruments Tiva TM4C123GH6PM Specifications

General IconGeneral
CoreARM Cortex-M4F
Clock Speed80 MHz
Flash Memory256 KB
SRAM32 KB
GPIO Pins43
UART8
I2C2
SPI/SSI4
USBUSB 2.0
Timers6
Communication InterfacesUART, I2C, SPI, USB
Operating Temperature-40°C to 85°C
PackageLQFP64

Summary

Boot Loader

Introduction

Explains the ROM-based boot loader and its interfaces for flash updates.

Serial Interfaces

Details the UART, SSI, and I2C interfaces used by the boot loader.

USB Interface

Describes the USB boot loader functionality using the DFU protocol.

Controller Area Network (CAN)

Flash

GPIO

Hibernation Module

Inter-Integrated Circuit (I2C)

Interrupt Controller (NVIC)

Memory Protection Unit (MPU)

Pulse Width Modulator (PWM)

Synchronous Serial Interface (SSI)

System Control

Timer

UART

uDMA Controller

USB Controller

Watchdog Timer

Functions

Lists and describes API functions for watchdog timer configuration, interrupts, and lock mechanism.

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