Analog to Digital Converter (ADC)
as ADC_PHASE_0 and ADC_PHASE_180) and having each ADC module sample the same
analog input, it is possible to increase the sampling rate of the analog input (with samples N,
N+2, N+4, and so on, coming from the first ADC and samples N+1, N+3, N+5, and so on,
coming from the second ADC). The ADC module has a single phase delay that is applied to all
sample sequences within that module.
Returns:
None.
5.2.1.15 ROM_ADCProcessorTrigger
Causes a processor trigger for a sample sequence.
Prototype:
void
ROM_ADCProcessorTrigger(uint32_t ui32Base,
uint32_t ui32SequenceNum)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_ADCTABLE is an array of pointers located at ROM_APITABLE[5].
ROM_ADCProcessorTrigger is a function pointer located at ROM_ADCTABLE[13].
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number, with ADC_TRIGGER_WAIT or
ADC_TRIGGER_SIGNAL optionally ORed into it.
Description:
This function triggers a processor-initiated sample sequence if the sample sequence trigger
is configured to ADC_TRIGGER_PROCESSOR. If ADC_TRIGGER_WAIT is ORed into the
sequence number, the processor-initiated trigger is delayed until a later processor-initiated
trigger to a different ADC module that specifies ADC_TRIGGER_SIGNAL, allowing multiple
ADCs to start from a processor-initiated trigger in a synchronous manner.
Returns:
None.
5.2.1.16 ROM_ADCReferenceGet
Returns the current setting of the ADC reference.
Prototype:
uint32_t
ROM_ADCReferenceGet(uint32_t ui32Base)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_ADCTABLE is an array of pointers located at ROM_APITABLE[5].
ROM_ADCReferenceGet is a function pointer located at ROM_ADCTABLE[23].
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