Flash
Note:
Because there is a write buffer in the Cortex-M4 processor, it may take several clock cycles
before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt
source be cleared early in the interrupt handler (as opposed to the very last action) to avoid
returning from the interrupt handler before the interrupt source is actually cleared. Failure to
do so may result in the interrupt handler being immediately reentered (because the interrupt
controller still sees the interrupt source asserted).
Returns:
None.
8.2.1.3 ROM_FlashIntDisable
Disables individual flash controller interrupt sources.
Prototype:
void
ROM_FlashIntDisable(uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_FLASHTABLE is an array of pointers located at ROM_APITABLE[7].
ROM_FlashIntDisable is a function pointer located at ROM_FLASHTABLE[11].
Parameters:
ui32IntFlags is a bit mask of the interrupt sources to be disabled. Can be any of the
FLASH_INT_PROGRAM or FLASH_INT_ACCESS values.
Description:
Disables the indicated flash controller interrupt sources. Only the sources that are enabled can
be reflected to the processor interrupt; disabled sources have no effect on the processor.
Returns:
None.
8.2.1.4 ROM_FlashIntEnable
Enables individual flash controller interrupt sources.
Prototype:
void
ROM_FlashIntEnable(uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_FLASHTABLE is an array of pointers located at ROM_APITABLE[7].
ROM_FlashIntEnable is a function pointer located at ROM_FLASHTABLE[10].
Parameters:
ui32IntFlags is a bit mask of the interrupt sources to be enabled. Can be any of the
FLASH_INT_PROGRAM or FLASH_INT_ACCESS values.
April 8, 2013 75
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