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Texas Instruments TMS320 DSP User Manual

Texas Instruments TMS320 DSP
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5.2 Use of Floating Point
5.3 TMS320C6xxx Rules and Guidelines
5.3.1 Endian Byte Ordering
5.3.2 Data Models
5.3.3 Program Model
Use of Floating Point
It is important to note that the use of global registers by algorithms is permitted. However, like
self-modifying code, their use must be invisible to clients. This can be accomplished by either never
modifying global registers or by disabling interrupts around those sections that modify and restore global
registers.
Referencing the float data type in an algorithm on a fixed point DSP causes a large floating point support
library to be included in any application that uses the algorithm.
Guideline 11
Algorithms should avoid the use of the float data type.
This section describes the rules and guidelines that are specific to the TMS320C6000 family of DSPs.
The C6x family supports both big and little endian data formats. This support takes the form of "boot time"
configuration. The DSP is configured at boot time to access memory either as big endian or little endian
and this setting remains fixed for the lifetime of the application.
The choice of which data format to use is often decided based on the presence of other processors in the
system; the data format of the other processors (which may not be configurable) determines the setting of
the C6x data format. Thus, it is not possible to simply choose a single data format for all
eXpressDSP-compliant algorithms
Rule 25
All C6x algorithms must be supplied in little endian format.
Guideline 12
All C6x algorithms should be supplied in both little and big endian formats.
The C6x C compiler supports a variety of data models; one small model and multiple large model modes.
Fortunately, it is relatively easy to mix the various data memory models in a single application
Programs will achieve optimal performance using small model compilation. This model limits, however, the
total size of the directly accessed data in an application to 32K bytes (in the worst case). Since algorithms
are intended for use in very large applications, all data references should be far references.
Rule 26
All C6x algorithms must access all static and global data as far data.
Rule 27
C6x algorithms must never assume placement in on-chip program memory; i.e., they must properly
operate with program memory operated in cache mode.
SPRU352G June 2005 Revised February 2007 DSP-Specific Guidelines 47
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Table of Contents

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Texas Instruments TMS320 DSP Specifications

General IconGeneral
CategoryDigital Signal Processor
ManufacturerTexas Instruments
Data Bus WidthVaries by model (e.g., 16-bit, 32-bit)
ArchitectureHarvard architecture
Address Bus WidthVaries by model
MemoryVaries by model
On-Chip RAMVaries by model
On-Chip ROMVaries by model
ApplicationsAudio processing, telecommunications
Operating TemperatureVaries by model
Package TypeVaries by model (e.g., QFP, BGA)

Summary

Preface

Read This First

Provides introductory information and context for the document.

Overview

Scope of the Standard

Defines the levels of guidelines for the TMS320 DSP Algorithm Standard.

Requirements of the Standard

Lists key elements and objectives for the TMS320 DSP Algorithm Standard.

Goals of the Standard

Outlines the objectives for creating and adhering to the TMS320 DSP Algorithm Standard.

Intentional Omissions

Lists aspects intentionally omitted from the current version of the standard.

System Architecture

Describes the common partitioning of modern DSP system architectures.

General Programming Guidelines

Use of C Language

Specifies adherence to C language run-time conventions for algorithm interoperability.

Threads and Reentrancy

Defines threads and discusses reentrancy requirements for algorithms.

Data Memory

Discusses memory allocation, types, and management for algorithms.

Program Memory

Covers requirements for code relocation and alignment in program memory.

ROM-ability

Addresses the ability of algorithm code to be placed in ROM.

Use of Peripherals

Prohibits direct peripheral access and outlines how algorithms can use DMA.

Algorithm Component Model

Interfaces and Modules

Describes modules as the basic software component and their interfaces.

Algorithms

Defines algorithms as modules implementing the IALG interface.

Packaging

Details how to bundle modules into a deliverable form for development systems.

Algorithm Performance Characterization

Data Memory

Characterizes algorithm data memory requirements (heap, stack, static).

Program Memory

Details requirements for characterizing algorithm program memory usage.

Interrupt Latency

Specifies how to characterize and limit worst-case interrupt latency.

Execution Time

Explains how to characterize typical and worst-case execution times for algorithms.

DSP-Specific Guidelines

CPU Register Types

Categorizes CPU registers and provides guidelines for their use.

Use of Floating Point

Advises against the use of floating-point data types to reduce library dependencies.

TMS320C6xxx Rules and Guidelines

Provides specific rules and guidelines for TMS320C6000 family DSPs.

TMS320C54xx Rules and Guidelines

Provides specific rules and guidelines for TMS320C5400 family DSPs.

TMS320C55x Rules and Guidelines

Provides specific rules and guidelines for TMS320C5500 family DSPs.

TMS320C24xx Guidelines

Provides specific rules and guidelines for TMS320C24xx family DSPs.

TMS320C28x Rules and Guidelines

Provides specific rules and guidelines for TMS320C28x family DSPs.

Use of the DMA Resource

Overview

Introduces rules and guidelines for algorithms utilizing DMA resources.

Algorithm and Framework

Defines the relationship between algorithms and frameworks for DMA resource management.

Requirements for the Use of the DMA Resource

Lists requirements for DMA usage in eXpressDSP-compliant algorithms.

Logical Channel

Explains the concept of logical DMA channels for algorithm use.

Data Transfer Properties

Defines parameters for DMA transfer blocks (frames, elements).

Data Transfer Synchronization

Discusses methods to ensure DMA transfers complete before CPU access.

Abstract Interface

Describes the IDMA2/IDMA3 interfaces for declaring DMA resource requirements.

Resource Characterization

Details how to characterize DMA resource usage (concurrency, size, frequency).

Runtime APIs

Lists allowed runtime APIs for configuring and managing DMA transfers.

Strong Ordering of DMA Transfer Requests

Explains FIFO ordering and queue ID properties for DMA transfers.

Submitting DMA Transfer Requests

Describes functions for submitting DMA transfer requests and their alignment requirements.

Device Independent DMA Optimization Guideline

Provides a guideline to minimize DMA channel reconfiguration overhead.

C6xxx Specific DMA Rules and Guidelines

Covers DMA rules and guidelines specific to C6000 series DSPs.

C55x Specific DMA Rules and Guidelines

Covers DMA rules and guidelines specific to C55x series DSPs.

Inter-Algorithm Synchronization

Discusses sharing physical DMA channels between algorithms.

Rules and Guidelines

General Rules

Enforces rules for eXpressDSP-compliant software and identifies guideline types.

Performance Characterization Rules

Lists rules related to characterizing algorithm performance metrics.

DMA Rules

Lists rules specifically for algorithms utilizing the DMA resource.

General Guidelines

Lists general recommendations for algorithm development.

DMA Guidelines

Lists guidelines related to DMA usage by algorithms.

Core Run-Time APIs

TI C-Language Run-Time Support Library

Lists allowable TI C-language run-time support library functions for algorithms.

DSP/BIOS Run-time Support Library

Lists allowable DSP/BIOS run-time support functions for algorithms.

Bibliography

Glossary

Glossary of Terms

Defines key terms used throughout the TMS320 DSP Algorithm Standard document.

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