ULT'TSMAN RC and
MS
SERVICE
Dl7
(74LS241) buffer control lines
(KD,
WR,
CLK, RES) and higher address lines
(A%-Al5) between CPU and
110
circuits.
(74LS245) buffers
between
CPU
and VO circuits
the CPU's IOM-line enables
line conwols operarion mode; line is in LOW
state when data is rpansf-ed from UO
(selected by CS-line) to the CPU and in
state when datais transfened from GPU to the
It0
circuit (selected by CS-line).
(74LS90, Counter) and (4040,
Counter) are used to divide CLK-signal.
(74LS 138) areused to encode
CS-lines for
XI0
circuits.
-
Real time clock MM58274 (D24) and
control circuits (B5, D27)
-
Input/Oupur controller 8255 (D30)
-
Timerlcounter 8253 (D25)
T
8251 (D31) and control circuits
(022, D32, D56)
-
InpuUOutput controller 8255 (033)
-
Keyboard controller 8279 (D35)
LCD control
-
TEEE-4881 RS-232ClCENTROMX (AS
AN
OPTTON) X6
M58274, Real Time Clock) and
(ICL7665, Voltage Detector) and
27
(4066, Analog Switch) compose a
calendar and a timing clock. Address space
(CS I) is OON-OFT3
(I6BYTE).
Circuit D5 detectstkc supply voltage.
tched off,
D5
md
D27 force
ines of the D28 to 3-state.
artery
61
is capable
to
supply the real rime
clock circuitq for ca. five years.
(8255 input1Outpue co
spaceofCS2is IOET-lFH(
Tables 3-6 to 3-8 illustrates descriptions of
input and output signals.
A0
Synchronizing pulse
"SYNC
A"
fmm
chopper
wheel
repping motor clock
frequency
A2 Real time clock intenupt
A3 Plate canier home position
detection (hall-element),
A4
positioned to a column
A5 Filter wheel position
A6 Filter wheel 0-state
A4
Synchronizing pulse
"
from chopper
wheel
Table 3-4
030
Input
signals,
port
A
Document Release Section age
35 1135%- 100-X 2.0 3
12
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
To Next Page
Loading...
