EasyManua.ls Logo

TYAN S8050 - Page 112

TYAN S8050
172 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
http://www.tyan.com
112
3.5.3.1 DDR Addressing Options Submenu
Chipselect Interleaving
Interleave memory blocks across the DRAM chip selects for node 0.
Disabled / Auto
BankSwapMode
BankSwapMode value: 0=Disabled, 1= SwapCPU
Disabled / Auto

Related product manuals