SARA-G3 series - System Integration Manual
UBX-13000995 - R06 Objective Specification Design-in
Page 135 of 218
If a 3.0 V Application Processor is used, appropriate unidirectional voltage translators must be provided
using the module V_INT output as 1.8 V supply, as described in Figure 52Figure 52.
4
V_INT
TxD
Application Processor
(3.0V DTE)
RxD
GND
SARA-G3 series
(1.8V DCE)
29
TXD_AUX
28
RXD_AUX
GND
1V8
B1 A1
GND
U1
VCCBVCCA
Unidirectional
Voltage Translator
C1
C2
3V0
DIR1
DIR2
OE
VCC
B2 A2
0 ohm
0 ohm
TP
TP
TP
Figure 54: UART AUX interface application circuit connecting a 3.0 V application processor
Part Number - Manufacturer
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
Unidirectional Voltage Translator
SN74AVC2T245 - Texas Instruments
Table 30: Component for UART AUX interface application circuit connecting a 3.0 V application processor
Refer to
Firmware Update Application Note
[22] for additional guidelines regarding the procedure for SARA-
G3 modules’ firmware upgrade over the auxiliary UART interface using the u-blox EasyFlash tool.
Any external signal connected to the auxiliary UART interface must be tri-stated or set low when
the module is in power-down mode and during the module power-on sequence (at least until the
activation of the V_INT supply output of the module), to avoid latch-up of circuits and allow a
proper boot of the module. If the external signals connected to the wireless module cannot be tri-
stated or set low, insert a multi channel digital switch (e.g. Texas Instruments SN74CB3Q16244,
TS5A3159, or TS5A63157) between the two-circuit connections and set to high impedance during
module power down mode and during the module power-on sequence.
ESD sensitivity rating of auxiliary UART pins is 1 kV (Human Body Model according to JESD22-
A114). Higher protection level could be required if the lines are externally accessible on the
application board. Higher protection level can be achieved by mounting an ESD protection (e.g.
EPCOS CA05P4S14THSG varistor array) close to accessible points.
2.5.2.2 Guidelines for UART AUX layout design
The auxiliary UART serial interface is not critical for the layout design since it is not used during normal
operation of SARA-G3 modules. Ensure accessibility to the TXD_AUX and RXD_AUX pins providing test
points on the application board.
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