NINA-B3 series - System integration manual 
UBX-17056748 - R13  Design-in  Page 41 of 72 
C1-Public 
NINA-B3 modules have been tested with a 3 x 3 cm PCB trace antenna, so it is recommended to keep 
an antenna design close to these measurements. You can still use a smaller or larger antenna as long 
as  it  is  tuned  to  resonate  at  13.56 MHz.  To  comply  with  European  regulatory  demands,  the  NFC 
antenna must be placed in such a way that the space between the NINA-B3 module and the remote 
NFC transmitter is always within 3 meters during transmission. 
 
Figure 15: NFC antenna design 
  
 
 
 
 
 
  
 
 
 
3.6.1  Battery protection 
If the  antenna  is  exposed  to a  strong  NFC field,  current  may flow in  the  opposite direction  on the 
supply because of parasitic diodes and ESD structures. 
If the  battery  used  does  not tolerate a return  current, a series diode  must be  placed  between the 
battery and the device in order to protect the battery. 
3.7  General High Speed layout guidelines 
These general design guidelines are considered as best practices and are valid for any bus present in 
NINA-B3  series  modules;  the  designer  should  prioritize  the  layout  of  higher  speed  buses.  Low 
frequency signals are generally not critical for layout. 
⚠  One  exception  is  represented  by  High  Impedance  traces  (such  as  signals  driven  by  weak  pull 
resistors) that may be affected by crosstalk. For those traces, a supplementary isolation of 4w 
from other buses is recommended. 
3.7.1  General considerations for schematic design and PCB floor-planning 
•  Verify  which  signal  bus  requires  termination  and  add  series  resistor  terminations  to  the 
schematics. 
•  Carefully  consider  the  placement  of  the  module  with  respect  to  antenna  position  and  host 
processor. 
•  Verify with PCB manufacturer allowable stack-ups and controlled impedance dimensioning. 
•  Verify  that  the  power  supply  design  and  power  sequence  are  compliant  with  NINA-B3  series  
supply interface specifications.