SARA-G3 and SARA-U2 series - System Integration Manual
UBX-13000995 - R26 System description
Page 53 of 217
1.9.1.4 UART and power-saving
The power saving configuration is controlled by the AT+UPSV command (for the complete description, see the
u-blox AT Commands Manual [3]). When power saving is enabled, the module automatically enters low power
idle mode whenever possible, and otherwise the active mode is maintained by the module (see section 1.4 for
definition and description of module operating modes referred to in this section).
The AT+UPSV command configures both the module power saving and also the UART behavior in relation to the
power saving. The conditions for the module entering idle mode also depend on the UART power saving
configuration.
Three different power saving configurations can be set by the AT+UPSV command:
AT+UPSV=0, power saving disabled: module forced on active mode and UART interface enabled (default)
AT+UPSV=1, power saving enabled: module cyclic active / idle mode and UART enabled / disabled
AT+UPSV=2, power saving enabled and controlled by the UART RTS input line
AT+UPSV=3, power saving enabled and controlled by the UART DTR input line
The AT+UPSV=3 power saving configuration is not supported by SARA-G3 modules.
The different power saving configurations that can be set by the +UPSV AT command are described in details in
the following subsections. Table 11 summarizes the UART interface communication process in the different
power saving configurations, in relation with HW flow control settings and RTS input line status. For more
details on the +UPSV AT command description, refer to the u-blox AT commands Manual [3].
Communication during idle mode and wake up
Data sent by the DTE are correctly received by the module.
Data sent by the module is correctly received by the DTE.
Data sent by the DTE should be buffered by the DTE and will be correctly
received by the module when RTS is set to ON.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Data sent by the DTE should be buffered by the DTE and will be correctly
received by the module when active mode is entered.
Data sent by the module is correctly received by the DTE.
Data sent by the DTE should be buffered by the DTE and will be correctly
received by the module when active mode is entered.
Data sent by the module is buffered by the module and will be correctly
received by the DTE when it is ready to receive data (i.e. RTS line will be ON).
The first character sent by the DTE is lost, but after ~20 ms the UART and the
module are waked up: recognition of subsequent characters is guaranteed after
the complete UART / module wake-up.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Not Applicable: HW flow control cannot be enabled with AT+UPSV=2.
Data sent by the DTE is correctly received by the module.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
Data sent by the DTE is lost by SARA-U2 modules.
The first character sent by the DTE is lost by SARA-G3 modules, but after
~20 ms the UART and the module are waked up: recognition of subsequent
characters is guaranteed after the complete UART / module wake-up.
Data sent by the module is correctly received by the DTE if it is ready to receive
data, otherwise data is lost.
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