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Xerox FaxCentre F110 - Page 133

Xerox FaxCentre F110
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General Procedures / Information
FaxCentre F110 12/04 6-47
Serial links
DigiColor2 has been extended to include two independent serial receiver / transmitters. Each is
able to operate either synchronously or asynchronously. The USARTs include programmable
baud rate generators and 16 byte send and receive FIFOs.
A third serial link is dedicated to chip card ISO7816.
1) USART 0:
This synchronous link is used to control the OPU: LCD and keypad.
RXpan, TXpan, Sclkpan
2) USART 1:
This link is used as a serial link to control the Dect base.
3) Chip card serial link:
The serial link ISO7816 for chip card is multiplexed with the ADC interface.
I/O mapping
The complete pixel bus port can be configured as pixel bus or as GPIO. In this case, the pin
PO_DATA0 is used for sending the video signal to the laser unit, so the pins PO_Datat7:1 can not
be used for any other function.
GPA[7:0] is also interrupt interface.
GPB[7:0] :
GPB[2..0] are reserved for the serial link USART0
GPB1 = RX0, GPB0 = TX0, GPB2 = SCLK0 (Even in asynchronous mode GPB2 can't be
used as an I/O)
GPC[7:0]:reserved for peripheral bus address (PB_addr[7:0]).
GPD[6:0]
GPD[5:0] are configured as ADC interface. When the signal FERCAP is active, the inter-
face is reconfigured ford Chip Car. If the CPAD signal it is not used for chip card function
in this mode, he can't either be used as an I/O.
GPD[6] is independent and used as an I/O.
CLK_EXT: This pin is sampled during the assertion of chip reset. A pull-down resistor
assert a "0" so internally generated clocks will be used. After exiting reset, this pin is con-
figured to output. Clk_Ext pin can be driven with an internally generated clock waveform
or static value.

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