Xilinx Spartan-6 LX9 User Manual

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Avnet Electronics Marketing 6 of 28 Rev D 24 Apr 2015
1.3 Reference Designs
Reference designs that demonstrate some of the potential applications of the Spartan-6 FPGA LX9 MicroBoard
are available and can be found on the Avnet Electronics Marketing Design Resource Center (DRC) web site:
www.em.avnet.com/s6microboard. See the PDF document included with each reference design for a complete
description of the design and detailed instructions for running a demonstration on the development board.
Check the DRC periodically for updates and new designs. The Expanded Getting Started Guide, available for
download from the DRC, is the best place to start.
Figure 1 – Spartan-6 FPGA LX9 MicroBoard Front
Figure 2 – Spartan-6 FPGA LX9 MicroBoard Back

Xilinx Spartan-6 LX9 Specifications

General

Logic Cells	9152
Registers	11440
Slices	1430
Block RAM (Kb)	576
DSP48A1 Slices	16
Number of I/O Banks	4
Input Delay Blocks	Yes
Output Delay Blocks	Yes
Maximum Single-Ended Output Current (mA)	24
I/O Standards Supported	LVTTL, LVCMOS, PCI, SSTL, HSTL
Maximum Differential Output Current (mA)	12