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Zte ZXR10 8900E series - Page 93

Zte ZXR10 8900E series
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ZXR10 8900E series Core Switch Product Description
ZTE Confidential Proprietary
© 2013 ZTE CORPORATION. All rights reserved.
83
4.3.1.2 Switching Module
The switching module is responsible for data switching of the whole system and providing
high-speed non-blocking switching channels between line cards. The switching module
employs specialized CROSSBAR chip and integrates multiple high-speed bidirectional
interfaces, so it can process wire-speed switching of multiple line cards. The switching
chip has the following functions:
Storage, forwarding and switching;
Support 16K bytes jumbo frame;
Support priority queue: when CoS queue is congested, it can selectively discard
some frames;
Provide a management control counter for each port.
4.3.1.3 Clock Module
This system adopts synchronous Ethernet Technology to realize clock frequency
synchronization and uses IEEE 1588 to perform phase modulation and time maintenance
to realize clock time synchronization. Synchronous Ethernet can perform system clock
frequency synchronization through the reference clock generated by 4 clock sources:
clock subcard local clock, Bits (2MHZ, 2Mbits), GPS, and line card line restorated clock.
To realize time synchronization, all boards in the system can check time through GPS or
1588 information obtained from any line card.
Synchronous Ethernet restores the clock by the PHY chip in the Ethernet; each interface
board selects one from the restored clocks of all ports and sends it to the two main
control boards respectively via the backplane; the main control board selects two (active
and standby) according to the configured policy and sends them to the clock module as
the one of the references of clock sources; the clock module will select the highest-quality
clock from clock subcard local clock, Bits (2MHZ, 2Mbits), GPS, and line card line
restoration clock and send it to the main control board; or the clock sources can be
configured with different priorities and the highest-priority clock is sent to the main control
board, which then sends this clock to each interface board as clock source for its chip. In
this way, Ethernet clock synchronization of the whole system is realized.
For 1588 processing, the line cards in the system and the main control board exchange
1588 information via bus connection. The main control board or any line card can be
configured as the synchronization source of the system; all other boards obtain
synchronization information from the synchronization source. Moreover, the clock
subcard of main control board can realize conversion between 1588 information and
GPS information via logic component to realize GPS time synchronization function.

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