3M DELTA Series - Page 34

B. REPRODUCE AMPLIFIER AND AUDIO OUTPUT
Reproduce Amplifier cards loaded for stereo
utilize two identical audio circuits. Therefore only
one audio channel will be discussed for simplicity.
Connections to the input stage are via ferrite beads
and terminate into the head loading circuit RIOL
C101, and the base of Q101. Q101 is an input buffer
stage which electrically isolates the reproduce head
from U101 during power up and power down. The
collector connects to -15 VDC. The emitter connects
to +15 VDC via an RC decoupling (filtering) network
consisting of RP101 and Cl 03. The buffer stage pre 
vents any DC voltage transients appearing at U101
pin 3 during power up/down from reaching and
magnetizing the head.
U101 is the head preamp and high frequency
equalizer. This stage has high gain and utilizes a
low noise 5534AN opamp IC. High frequency gain is
controled by R107 in the feedback loop. Changing
equalization standards is accomplished by chang 
ing the value of R105 Preamp output is nominally +2
dBm at 1 kHz referenced to 160 nWb/m flux level.
Audio output level is set by R109, at the output of this
stage.
Audio is AC coupled to the analog switch, U107,
via Cl 11. U1 07, a 4052 BC CMOS switch is powered
by ±7.5 volts which is obtained by dividing down the
on-board ±15 VDC supplies. Audio enters the switch
on pin 11, and exits on pin 13 (pins 4 and 3 for the
right channel). R115 and R116 resistors control the
gates of U107. During "mute," U107 pin 9 is pulled
low, and no audio passes. Muting logic "low" is
supplied by the play microprocessor.
Audio from the analog switch is routed to half of
U 103 as a driver for the phase inverter half of U105.
It is a combination medium-gain 23 dB buffer. Audio
from U103 is phase inverted in U105 and routed to
the second half (-) input of U105, while being routed
directly to U 103. The audio appearing on the inputs
of U103 and U105 are 180° out of phase. Feedback
for the output stages is cross coupled via other RP107
sections. In a transformer-coupled output, the output
amplifiers are DC coupled to the transformer pri 
mary. When operating in a balanced-transformer-
less output configuration, output audio is AC coupled
via a 220 mid nonpolar capacitor in each output
leg. Should the output become unbalanced with
one side shorted to ground, the cross-coupled feed 
back compensates for the grounded condition. It
"adjusts" the gain of the remaining functioning out 
put section.
C. PLAY LOGIC
The play logic is the heart of the machine, in
that all activity of the machine is monitored and
controlled by the on-board microprocessor. Delta
Series units utilize an 8-bit processor with IK ROM.
All machine functions are programmed into soft 
ware contained in the memory. The Play Logic card
contains the microprocessor clock, input multiplex 
ers, output buffers, and divider chains for motor con 
trol. The motor circuits will be discussed in a later
section.
Clock frequency for the play processor is 5.22350
MHz, and is crystal controlled. The processor con 
tains internal clock driver circuits and will operate
from a crystal attached directly to pins 2 and 3. C219
and C220 form a portion of the oscillator circuit.
All Delta Series Play Logic cards contain hard 
ware and software to be used in ANY Delta repro 
ducer. A single deck Delta I play logic board may
be directly replaced by a three deck Delta III board,
and vice-versa. Delta I units use the input and output
circuitry designated for the BOTTOM deck of a Delta
III logic card. Inputs and outputs to the logic board
are via the PCB edge connector. This occurs where it
interfaces with the front panel switches and lamps,
internal control lines to other circuits, and to the two
rear panel connectors for Remote Control and inter 
face with the add-on Delta IV Record amplifier. Due
to its utility design, it is practical for a station to have
a spare play logic board to be used for backing up
several Delta model playback machines in service.
The Delta system uses active low logic. Ground
going signals activate the various logic functions.
Data inputs to the processor are via U203, a 16-bit
multiplexing gate, and U204, an 8-bit multiplexing
gate. Logic inputs to the multiplexers are held logic
"HI" by 330 ohm pullups in RP201 and IK ohm in
RP202, 203 and 204. In addition, external input lines
are debounced with .1 mfd capacitors to ground.
The combination of the 330 ohm “ hard" pullup, and
the .1 mfd debounce capacitors make the Delta
logic relatively noise immune.
A low input from the cart switch, pin 19 of the
edge connector, causes the processor to execute a
software "cart loaded" sequence. The processor out 
puts a low on pin 34, READY, which provides a low
output at pin 5 of U209, a 75451 peripheral driver.
This low causes the ready lamp to illuminate, giving
the operator a visual indication the cart is correctly
loaded and the processor is prepared for the start
sequence. Pressing the START switch pulls pin 21 of
U203 low, which outputs a signal to the processor via
pins 11, 13, 14, and 15. Once the processor recog 
nizes this condition, it outputs a low on pin 31, U201,
to unmute the audio; a low on pin 30 to energize the
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